Specification of CAN driver for the TCAN4550. More...

#include <MCAN.hxx>

Inheritance diagram for TCAN4550Can:

Classes
struct	Cccr
	CC control register definition. More...

struct	Dbtp
	Data bit timing and prescaler register definition. More...

struct	Ile
	MCAN interrupt line enable register definition. More...

struct	Interrupt
	TCAN4550 interrupt registers (INTERRUPT_ENABLE/STATUS) More...

struct	MCANInterrupt
	MCAN interrupt registers (IR, IE, and ILS) definition. More...

struct	Mode
	Mode register definition. More...

struct	MRAMRXBuffer
	RX Buffer structure. More...

struct	MRAMSPIMessage
	MRAM SPI message for read/write commands. More...

struct	MRAMTXBuffer
	TX Buffer structure. More...

struct	MRAMTXBufferMultiWrite
	Structure for writing multiple TX buffers in one SPI transaction. More...

struct	MRAMTXEventFIFOElement
	TX Event FIFO Element structure. More...

struct	Nbtp
	Nominal bit timing & prescaler register definition. More...

struct	Psr
	Protocol status register definition. More...

struct	Rxfxa
	RX FIFO x acknowledge register definition. More...

struct	Rxfxc
	RX FIFO x configuraation register definition. More...

struct	Rxfxs
	RX FIFO x status register definition. More...

struct	SPIMessage
	SPI message for read/write commands. More...

struct	TCAN4550Baud
	Buad rate table entry. More...

struct	Tocc
	Timeout counter configuration register definition. More...

struct	Tocv
	Timeout counter value register definition. More...

struct	Tscc
	Timestamp counter configuration register definition. More...

struct	Tscv
	Timestamp counter value register definition. More...

struct	Txbc
	TX Buffer configuraation register definition. More...

struct	Txefa
	TX event FIFO acknowledge register definition. More...

struct	Txefc
	TX event FIFO configuration register definition. More...

struct	Txefs
	TX event FIFO status register definition. More...

struct	Txesc
	TX buffer element size configurataion register definition. More...

struct	Txfqs
	TX FIFO/queue status register definition. More...

Public Member Functions
	TCAN4550Can (const char name, void(interrupt_enable)(), void(interrupt_disable)(), const Gpio test_pin=nullptr)
	Constructor.

	~TCAN4550Can ()
	Destructor.

void	init (const char *spi_name, uint32_t freq, uint32_t baud, uint16_t rx_timeout_bits)
	Initialize CAN device settings.

void	interrupt_handler ()
	Handle an interrupt. Called by user provided interrupt handler.

OSMutex *	get_spi_bus_lock ()
	Return a mutex that can be used by another SPI driver instance sharing the same bus as its bus lock.

	TCAN4550Can (const char name, void(interrupt_enable)(), void(interrupt_disable)(), const Gpio test_pin=nullptr)
	Constructor.

	~TCAN4550Can ()
	Destructor.

void	init (const char *spi_name, uint32_t freq, uint32_t baud, uint16_t rx_timeout_bits)
	Initialize CAN device settings.

void	interrupt_handler ()
	Handle an interrupt. Called by user provided interrupt handler.

OSMutex *	get_spi_bus_lock ()
	Return a mutex that can be used by another SPI driver instance sharing the same bus as its bus lock.

Public Member Functions inherited from Can
int	available ()

int	availableForWrite ()

int	read (struct can_frame *frame)
	Read a frame if there is one available.

int	write (const struct can_frame *frame)
	Send a frame if there is space available.

Public Member Functions inherited from Device
	Device (const char *name)
	Constructor.

virtual	~Device ()
	Destructor.

Public Member Functions inherited from OSThread
	OSThread (const char name, int priority, size_t stack_size, void (start_routine)(void ), void *arg)
	Create a thread.

	OSThread ()
	Creates a thread via inheritance.

void	start (const char *name, int priority, size_t stack_size)
	Starts the thread.

virtual	~OSThread ()
	Default destructor.

bool	is_created ()

void	inherit ()
	Inherits the current thread.

os_thread_t	get_handle ()

void	lock_to_thread ()
	Sets the thread handle to the current calling thread's.

void	unlock_from_thread ()
	Resets the thread handle to none.

Private Types
enum	Registers : uint16_t { DEVICE_IDL = 0x0 , DEVICE_IDH , REVISION , STATUS , MODE = 0x200 , TIMESTAMP_PRESCALER , TEST , ECC , INTERRUPT_STATUS = 0x208 , MCAN_INTERRUPT_STATUS , INTERRUPT_ENABLE = 0x20C , CREL = 0x400 , ENDN , CUST , DBTP , TEST2 , RWD , CCCR , NBTP , TSCC , TSCV , TOCC , TOCV , RSVD1 , RSVD2 , RSVD3 , RSVD4 , ECR , PSR , TDCR , RSVD5 , IR , IE , ILS , ILE , RSVD6 , RSVD7 , RSVD8 , RSVD9 , RSVD10 , RSVD11 , RSVD12 , RSVD13 , GFC , SIDFC , XIDFC , RSVD14 , XIDAM , HPMS , NDAT1 , NDAT2 , RXF0C , RXF0S , RXF0A , RXBC , RXF1C , RXF1S , RXF1A , RXESC , TXBC , TXFQS , TXESC , TXBRP , TXBAR , TXBCR , TXBTO , TXBCF , TXBTIE , TXBCIE , RSVD15 , RSVD16 , TXEFC , TXEFS , TXEFA , RSVD17 , MRAM = 0x2000 , DEVICE_IDL = 0x0 , DEVICE_IDH , REVISION , STATUS , MODE = 0x200 , TIMESTAMP_PRESCALER , TEST , ECC , INTERRUPT_STATUS = 0x208 , MCAN_INTERRUPT_STATUS , INTERRUPT_ENABLE = 0x20C , CREL = 0x400 , ENDN , CUST , DBTP , TEST2 , RWD , CCCR , NBTP , TSCC , TSCV , TOCC , TOCV , RSVD1 , RSVD2 , RSVD3 , RSVD4 , ECR , PSR , TDCR , RSVD5 , IR , IE , ILS , ILE , RSVD6 , RSVD7 , RSVD8 , RSVD9 , RSVD10 , RSVD11 , RSVD12 , RSVD13 , GFC , SIDFC , XIDFC , RSVD14 , XIDAM , HPMS , NDAT1 , NDAT2 , RXF0C , RXF0S , RXF0A , RXBC , RXF1C , RXF1S , RXF1A , RXESC , TXBC , TXFQS , TXESC , TXBRP , TXBAR , TXBCR , TXBTO , TXBCF , TXBTIE , TXBCIE , RSVD15 , RSVD16 , TXEFC , TXEFS , TXEFA , RSVD17 , MRAM = 0x2000 }
	SPI Registers, word addressing, not byte addressing. More...

enum	Command : uint8_t { WRITE = 0x61 , READ = 0x41 , WRITE = 0x61 , READ = 0x41 }

enum	Registers : uint16_t { DEVICE_IDL = 0x0 , DEVICE_IDH , REVISION , STATUS , MODE = 0x200 , TIMESTAMP_PRESCALER , TEST , ECC , INTERRUPT_STATUS = 0x208 , MCAN_INTERRUPT_STATUS , INTERRUPT_ENABLE = 0x20C , CREL = 0x400 , ENDN , CUST , DBTP , TEST2 , RWD , CCCR , NBTP , TSCC , TSCV , TOCC , TOCV , RSVD1 , RSVD2 , RSVD3 , RSVD4 , ECR , PSR , TDCR , RSVD5 , IR , IE , ILS , ILE , RSVD6 , RSVD7 , RSVD8 , RSVD9 , RSVD10 , RSVD11 , RSVD12 , RSVD13 , GFC , SIDFC , XIDFC , RSVD14 , XIDAM , HPMS , NDAT1 , NDAT2 , RXF0C , RXF0S , RXF0A , RXBC , RXF1C , RXF1S , RXF1A , RXESC , TXBC , TXFQS , TXESC , TXBRP , TXBAR , TXBCR , TXBTO , TXBCF , TXBTIE , TXBCIE , RSVD15 , RSVD16 , TXEFC , TXEFS , TXEFA , RSVD17 , MRAM = 0x2000 , DEVICE_IDL = 0x0 , DEVICE_IDH , REVISION , STATUS , MODE = 0x200 , TIMESTAMP_PRESCALER , TEST , ECC , INTERRUPT_STATUS = 0x208 , MCAN_INTERRUPT_STATUS , INTERRUPT_ENABLE = 0x20C , CREL = 0x400 , ENDN , CUST , DBTP , TEST2 , RWD , CCCR , NBTP , TSCC , TSCV , TOCC , TOCV , RSVD1 , RSVD2 , RSVD3 , RSVD4 , ECR , PSR , TDCR , RSVD5 , IR , IE , ILS , ILE , RSVD6 , RSVD7 , RSVD8 , RSVD9 , RSVD10 , RSVD11 , RSVD12 , RSVD13 , GFC , SIDFC , XIDFC , RSVD14 , XIDAM , HPMS , NDAT1 , NDAT2 , RXF0C , RXF0S , RXF0A , RXBC , RXF1C , RXF1S , RXF1A , RXESC , TXBC , TXFQS , TXESC , TXBRP , TXBAR , TXBCR , TXBTO , TXBCF , TXBTIE , TXBCIE , RSVD15 , RSVD16 , TXEFC , TXEFS , TXEFA , RSVD17 , MRAM = 0x2000 }
	SPI Registers, word addressing, not byte addressing. More...

enum	Command : uint8_t { WRITE = 0x61 , READ = 0x41 , WRITE = 0x61 , READ = 0x41 }

Private Member Functions
void	flush_buffers () override
	Called after disable.

ssize_t	read (File file, void buf, size_t count) override
	Read from a file or device.

ssize_t	write (File file, const void buf, size_t count) override
	Write to a file or device.

int	ioctl (File *file, unsigned long int key, unsigned long data) override
	Request an ioctl transaction.

bool	select (File *file, int mode) override
	Device select method.

void *	entry () override
	User entry point for the created thread.

void	enable () override
	function to enable device

void	disable () override
	function to disable device

void	tx_msg () override
	Function to try and transmit a message.

uint32_t	register_read (Registers address)
	Read from a SPI register.

void	register_write (Registers address, uint32_t data)
	Write to a SPI register.

void	rxbuf_read (uint16_t offset, MRAMRXBuffer *buf, size_t count)
	Read one or more RX buffers.

void	txbuf_write (uint16_t offset, MRAMTXBufferMultiWrite *buf, size_t count)
	Write one or more TX buffers.

	TCAN4550Can ()
	Default Constructor.

	DISALLOW_COPY_AND_ASSIGN (TCAN4550Can)

void	flush_buffers () override
	Called after disable.

ssize_t	read (File file, void buf, size_t count) override
	Read from a file or device.

ssize_t	write (File file, const void buf, size_t count) override
	Write to a file or device.

int	ioctl (File *file, unsigned long int key, unsigned long data) override
	Request an ioctl transaction.

bool	select (File *file, int mode) override
	Device select method.

void *	entry () override
	User entry point for the created thread.

void	enable () override
	function to enable device

void	disable () override
	function to disable device

void	tx_msg () override
	Function to try and transmit a message.

uint32_t	register_read (Registers address)
	Read from a SPI register.

void	register_write (Registers address, uint32_t data)
	Write to a SPI register.

void	rxbuf_read (uint16_t offset, MRAMRXBuffer *buf, size_t count)
	Read one or more RX buffers.

void	txbuf_write (uint16_t offset, MRAMTXBufferMultiWrite *buf, size_t count)
	Write one or more TX buffers.

	TCAN4550Can ()
	Default Constructor.

	DISALLOW_COPY_AND_ASSIGN (TCAN4550Can)

Private Member Functions inherited from Atomic
void	lock ()

void	unlock ()

Private Attributes
void(*	interruptEnable_ )()
	enable interrupt callback

void(*	interruptDisable_ )()
	disable interrupt callback

int	spiFd_
	SPI bus that accesses TCAN4550.

SPI *	spi_
	pointer to a SPI object instance

OSSem	sem_
	semaphore for posting events

MCANInterrupt	mcanInterruptEnable_
	shadow for the interrupt enable

uint32_t	txCompleteMask_
	shadow for the transmit complete buffer mask

uint8_t	state_
	present bus state

uint8_t	txPending_: 1
	waiting on a TX active event

uint8_t	rxPending_: 1
	waiting on a RX active event

MRAMTXBufferMultiWrite	txBufferMultiWrite_
	Allocating this buffer here avoids having to put it on the TCAN4550Can::write() caller's stack.

Static Private Attributes
static constexpr uint32_t	SPI_MAX_SPEED_HZ = 18000000
	maximum SPI clock speed in Hz

static constexpr size_t	MRAM_SIZE_WORDS = (2 * 1024) / 4
	size in words of the MRAM memory

static constexpr uint32_t	RX_FIFO_SIZE = 64
	size in elements for the RX FIFO

static constexpr uint32_t	TX_EVENT_FIFO_SIZE = 16
	size in elements for the TX event FIFO

static constexpr uint32_t	TX_DEDICATED_BUFFER_COUNT = 16
	size in elements for the dedicated TX buffers

static constexpr uint32_t	TX_FIFO_SIZE = 16
	size in elements for the TX FIFO

static constexpr uint32_t	TX_FIFO_BUFFERS_MASK = 0xFFFF0000
	mask of all the TX buffers used in the TX FIFO

static constexpr uint16_t	RX_FIFO_0_MRAM_ADDR = 0x0000
	start address of RX FIFO 0 in MRAM

static constexpr uint16_t	TX_EVENT_FIFO_MRAM_ADDR = 0x0400
	start address of TX Event FIFO in MRAM

static constexpr uint16_t	TX_BUFFERS_MRAM_ADDR = 0x0480
	start address of TX BUFFERS in MRAM

static constexpr uint16_t	TX_FIFO_BUFFERS_MRAM_ADDR = 0x0580
	start address of TX FIFO in MRAM

static constexpr uint16_t	MRAM_ADDR_OFFSET = 0x8000
	Offset of the MRAM address over SPI.

static const TCAN4550Baud	BAUD_TABLE []
	baud rate settings table

Additional Inherited Members
Static Public Member Functions inherited from Device
static int	open (struct _reent reent, const char path, int flags, int mode)
	Open a file or device.

static int	close (struct _reent *reent, int fd)
	Close a file or device.

static int	stat (struct _reent reent, const char path, struct stat *stat)
	Get the status information of a file or device.

static int	select (int nfds, fd_set readfds, fd_set writefds, fd_set *exceptfds, long long timeout)
	POSIX select().

static void	select_clear ()
	Clears the current thread's select bits.

Static Public Member Functions inherited from FileIO
static ssize_t	read (struct _reent reent, int fd, void buf, size_t count)
	Read from a file or device.

static ssize_t	write (struct _reent reent, int fd, const void buf, size_t count)
	Write to a file or device.

static _off_t	lseek (struct _reent *reent, int fd, _off_t offset, int whence)
	Change the offset index of a file or device.

static int	fstat (struct _reent reent, int fd, struct stat stat)
	Get the status information of a file or device.

static int	ioctl (int fd, unsigned long int key, unsigned long data)
	Request and ioctl transaction.

static int	fcntl (int fd, int cmd, unsigned long data)
	Manipulate a file descriptor.

static bool	is_device (int fd)
	Test if the file descriptor belongs to a device.

Static Public Member Functions inherited from OSThread
static int	getpriority (OSThread *thread)
	Return the current thread priority.

static int	get_priority (OSThread *thread)
	Return the current thread priority.

static int	get_priority_min ()
	Get the minimum thread priority.

static int	get_priority_max ()
	Get the maximum thread priority.

Static Public Attributes inherited from Can
static unsigned	numReceivedPackets_ {0}

static unsigned	numTransmittedPackets_ {0}

Protected Member Functions inherited from Can
	Can (const char *ignored)
	Constructor.

	~Can ()
	Destructor.

	Can (const char *name, size_t tx_buffer_size=config_can_tx_buffer_size(), size_t rx_buffer_size=config_can_rx_buffer_size())
	Constructor.

	~Can ()
	Destructor.

bool	has_tx_buffer_space () OVERRIDE

bool	has_rx_buffer_data () OVERRIDE

Protected Member Functions inherited from Atomic
void	lock ()

void	unlock ()

Protected Member Functions inherited from NonBlockNode
	NonBlockNode (const char *name)
	Constructor.

Protected Member Functions inherited from Node
	Node (const char *name)
	Constructor.

virtual	~Node ()
	Destructor.

int	open (File , const char , int, int) OVERRIDE
	Open method.

int	close (File *) OVERRIDE
	Close method.

virtual int	fstat (File file, struct stat stat) override
	Get the status information of a file or device.

	Device (const char *name)
	Constructor.

virtual	~Device ()
	Destructor.

Protected Member Functions inherited from FileIO
	FileIO (const char *name)
	Constructor.

virtual	~FileIO ()
	Destructor.

virtual off_t	lseek (File *f, off_t offset, int whence)
	Seek method.

virtual int	fcntl (File *file, int cmd, unsigned long data)
	Manipulate a file descriptor.

Static Protected Member Functions inherited from Device
static void	select_insert (SelectInfo *info)
	Add client to list of clients needing woken.

static void	select_wakeup (SelectInfo *info)
	Wakeup the list of clients needing woken.

static void	select_wakeup_from_isr (SelectInfo info, int woken)
	Wakeup the list of clients needing woken.

static int	open (struct _reent reent, const char path, int flags, int mode)
	Open a file or device.

static int	close (struct _reent *reent, int fd)
	Close a file or device.

static int	stat (struct _reent reent, const char path, struct stat *stat)
	Get the status information of a file or device.

static int	select (int nfds, fd_set readfds, fd_set writefds, fd_set *exceptfds, long long timeout)
	POSIX select().

static void	select_clear ()
	Clears the current thread's select bits.

Static Protected Member Functions inherited from FileIO
static int	fd_alloc (void)
	Allocate a free file descriptor.

static void	fd_free (int fd)
	Free up a file descriptor.

static File *	file_lookup (int fd)
	Looks up a reference to a File corresponding to a given file descriptor.

static int	fd_lookup (File *file)
	Looks up a file descriptor corresponding to a given File reference.

static ssize_t	read (struct _reent reent, int fd, void buf, size_t count)
	Read from a file or device.

static ssize_t	write (struct _reent reent, int fd, const void buf, size_t count)
	Write to a file or device.

static _off_t	lseek (struct _reent *reent, int fd, _off_t offset, int whence)
	Change the offset index of a file or device.

static int	fstat (struct _reent reent, int fd, struct stat stat)
	Get the status information of a file or device.

static int	ioctl (int fd, unsigned long int key, unsigned long data)
	Request and ioctl transaction.

static int	fcntl (int fd, int cmd, unsigned long data)
	Manipulate a file descriptor.

static bool	is_device (int fd)
	Test if the file descriptor belongs to a device.

Protected Attributes inherited from Can
DeviceBuffer< struct can_frame > *	txBuf
	transmit buffer

DeviceBuffer< struct can_frame > *	rxBuf
	receive buffer

unsigned int	overrunCount
	overrun count

unsigned int	busOffCount
	bus-off count

unsigned int	softErrorCount
	soft error count

Protected Attributes inherited from NonBlockNode
Notifiable *	readableNotify_
	This will be notified if the device has data avilable for read.

Notifiable *	writableNotify_
	This will be notified if the device has buffer avilable for write.

Protected Attributes inherited from Node
OSMutex	lock_
	protects internal structures.

mode_t	mode_
	File open mode, such as O_NONBLOCK.

unsigned int	references_
	number of open references

Protected Attributes inherited from FileIO
const char *	name
	device name

Static Protected Attributes inherited from FileIO
static const unsigned int	numOpenFiles = 20

static File	files []
	File descriptor pool.

static OSMutex	mutex
	mutual exclusion for fileio

Detailed Description

Specification of CAN driver for the TCAN4550.

Todo:: The TCAN4550 uses the Bosch MCAN IP. If we end up supporting other devices that also use this IP, then some of the generic MCAN related content can be factored out into a common location.

Todo:: The TCAN4550 uses the Bosch MCAN IP. If we end up supporting other devices that also use this IP, then some of the generic MCAN related content can be factored out into a common location.

Definition at line 53 of file MCAN.hxx.

Member Enumeration Documentation

◆ Command [1/2]

enum TCAN4550Can::Command : uint8_t

private

Enumerator
WRITE	write one or more addresses
READ	read one or more addresses
WRITE	write one or more addresses
READ	read one or more addresses

Definition at line 278 of file MCAN.hxx.

◆ Command [2/2]

enum TCAN4550Can::Command : uint8_t

private

Enumerator
WRITE	write one or more addresses
READ	read one or more addresses
WRITE	write one or more addresses
READ	read one or more addresses

Definition at line 278 of file TCAN4550Can.hxx.

◆ Registers [1/2]

enum TCAN4550Can::Registers : uint16_t

private

SPI Registers, word addressing, not byte addressing.

This means that the values here need to be multiplied by 4 to get the actual address.

Enumerator
DEVICE_IDL	device ID "TCAN"
DEVICE_IDH	device ID "4550"
REVISION	silicon revision
STATUS	status
MODE	modes of operation and pin configurations
TIMESTAMP_PRESCALER	timestamp presacaler
TEST	read and write test registers, scratchpad
ECC	ECC error detection and testing.
INTERRUPT_STATUS	interrupt and diagnostic flags
MCAN_INTERRUPT_STATUS	interrupt flags related to MCAN core
INTERRUPT_ENABLE	interrupt and diagnostic flags
CREL	core release
ENDN	endianess
CUST	customer
DBTP	data bit timing and prescaler
TEST2	test
RWD	RAM watchdog.
CCCR	CC control.
NBTP	nominal bit timing and prescaler
TSCC	timestamp counter configuration
TSCV	timestamp counter value
TOCC	timeout counter configuration
TOCV	timeout counter value
RSVD1	reserved
RSVD2	reserved
RSVD3	reserved
RSVD4	reserved
ECR	error count
PSR	protocol status
TDCR	transmitter delay compensation
RSVD5	reserved
IR	interrupt status
IE	interrupt enable
ILS	interrupt line select
ILE	interrupt line enable
RSVD6	reserved
RSVD7	reserved
RSVD8	reserved
RSVD9	reserved
RSVD10	reserved
RSVD11	reserved
RSVD12	reserved
RSVD13	reserved
GFC	0x80 0x80 global filter configuration
SIDFC	0x84 -— standard ID filter configuration
XIDFC	0x88 -— extended ID filter configuration
RSVD14	0x8C -— reserved
XIDAM	0x90 0x84 extended ID and mask
HPMS	0x94 0x88 high prioirty message status
NDAT1	0x98 -— new data 1
NDAT2	0x9C -— new data 2
RXF0C	0xA0 -— RX FIFO 0 configuration
RXF0S	0xA4 0x90 RX FIFO 0 status
RXF0A	0xA8 0x94 RX FIFO 0 Acknowledge
RXBC	0xAC -— RX buffer configuration
RXF1C	0xB0 -— RX FIFO 1 configuration
RXF1S	0xB4 0x98 RX FIFO 1 status
RXF1A	0xB8 0x9C RX FIFO 1 acknowledge
RXESC	0xBC -— RX buffer/FIFO element size configuration
TXBC	0xC0 0xC0 TX buffer configuration
TXFQS	0xC4 0xC4 TX FIFO/queue status
TXESC	0xC8 -— TX buffer element size configuration
TXBRP	0xCC 0xC8 TX buffer request pending
TXBAR	0xD0 0xCC TX buffer add request
TXBCR	0xD4 0xD0 TX buffer cancellation request
TXBTO	0xD8 0xD4 TX buffer transmission occurred
TXBCF	0xDC 0xD8 TX buffer cancellation finished
TXBTIE	0xE0 0xDC TX buffer transmission interrupt enable
TXBCIE	0xE4 0xE0 TX buffer cancellation finished interrupt enable
RSVD15	0xE8 -— reserved
RSVD16	0xEC -— reserved
TXEFC	0xF0 -— TX event FIFO configuration
TXEFS	0xF4 0xE4 TX event FIFO status
TXEFA	0xF8 0xE8 TX event FIFO acknowledge
RSVD17	reserved
MRAM	MRAM offset.
DEVICE_IDL	device ID "TCAN"
DEVICE_IDH	device ID "4550"
REVISION	silicon revision
STATUS	status
MODE	modes of operation and pin configurations
TIMESTAMP_PRESCALER	timestamp presacaler
TEST	read and write test registers, scratchpad
ECC	ECC error detection and testing.
INTERRUPT_STATUS	interrupt and diagnostic flags
MCAN_INTERRUPT_STATUS	interrupt flags related to MCAN core
INTERRUPT_ENABLE	interrupt and diagnostic flags
CREL	core release
ENDN	endianess
CUST	customer
DBTP	data bit timing and prescaler
TEST2	test
RWD	RAM watchdog.
CCCR	CC control.
NBTP	nominal bit timing and prescaler
TSCC	timestamp counter configuration
TSCV	timestamp counter value
TOCC	timeout counter configuration
TOCV	timeout counter value
RSVD1	reserved
RSVD2	reserved
RSVD3	reserved
RSVD4	reserved
ECR	error count
PSR	protocol status
TDCR	transmitter delay compensation
RSVD5	reserved
IR	interrupt status
IE	interrupt enable
ILS	interrupt line select
ILE	interrupt line enable
RSVD6	reserved
RSVD7	reserved
RSVD8	reserved
RSVD9	reserved
RSVD10	reserved
RSVD11	reserved
RSVD12	reserved
RSVD13	reserved
GFC	0x80 0x80 global filter configuration
SIDFC	0x84 -— standard ID filter configuration
XIDFC	0x88 -— extended ID filter configuration
RSVD14	0x8C -— reserved
XIDAM	0x90 0x84 extended ID and mask
HPMS	0x94 0x88 high prioirty message status
NDAT1	0x98 -— new data 1
NDAT2	0x9C -— new data 2
RXF0C	0xA0 -— RX FIFO 0 configuration
RXF0S	0xA4 0x90 RX FIFO 0 status
RXF0A	0xA8 0x94 RX FIFO 0 Acknowledge
RXBC	0xAC -— RX buffer configuration
RXF1C	0xB0 -— RX FIFO 1 configuration
RXF1S	0xB4 0x98 RX FIFO 1 status
RXF1A	0xB8 0x9C RX FIFO 1 acknowledge
RXESC	0xBC -— RX buffer/FIFO element size configuration
TXBC	0xC0 0xC0 TX buffer configuration
TXFQS	0xC4 0xC4 TX FIFO/queue status
TXESC	0xC8 -— TX buffer element size configuration
TXBRP	0xCC 0xC8 TX buffer request pending
TXBAR	0xD0 0xCC TX buffer add request
TXBCR	0xD4 0xD0 TX buffer cancellation request
TXBTO	0xD8 0xD4 TX buffer transmission occurred
TXBCF	0xDC 0xD8 TX buffer cancellation finished
TXBTIE	0xE0 0xDC TX buffer transmission interrupt enable
TXBCIE	0xE4 0xE0 TX buffer cancellation finished interrupt enable
RSVD15	0xE8 -— reserved
RSVD16	0xEC -— reserved
TXEFC	0xF0 -— TX event FIFO configuration
TXEFS	0xF4 0xE4 TX event FIFO status
TXEFA	0xF8 0xE8 TX event FIFO acknowledge
RSVD17	reserved
MRAM	MRAM offset.

Definition at line 184 of file MCAN.hxx.

◆ Registers [2/2]

enum TCAN4550Can::Registers : uint16_t

private

SPI Registers, word addressing, not byte addressing.

This means that the values here need to be multiplied by 4 to get the actual address.

Enumerator
DEVICE_IDL	device ID "TCAN"
DEVICE_IDH	device ID "4550"
REVISION	silicon revision
STATUS	status
MODE	modes of operation and pin configurations
TIMESTAMP_PRESCALER	timestamp presacaler
TEST	read and write test registers, scratchpad
ECC	ECC error detection and testing.
INTERRUPT_STATUS	interrupt and diagnostic flags
MCAN_INTERRUPT_STATUS	interrupt flags related to MCAN core
INTERRUPT_ENABLE	interrupt and diagnostic flags
CREL	core release
ENDN	endianess
CUST	customer
DBTP	data bit timing and prescaler
TEST2	test
RWD	RAM watchdog.
CCCR	CC control.
NBTP	nominal bit timing and prescaler
TSCC	timestamp counter configuration
TSCV	timestamp counter value
TOCC	timeout counter configuration
TOCV	timeout counter value
RSVD1	reserved
RSVD2	reserved
RSVD3	reserved
RSVD4	reserved
ECR	error count
PSR	protocol status
TDCR	transmitter delay compensation
RSVD5	reserved
IR	interrupt status
IE	interrupt enable
ILS	interrupt line select
ILE	interrupt line enable
RSVD6	reserved
RSVD7	reserved
RSVD8	reserved
RSVD9	reserved
RSVD10	reserved
RSVD11	reserved
RSVD12	reserved
RSVD13	reserved
GFC	0x80 0x80 global filter configuration
SIDFC	0x84 -— standard ID filter configuration
XIDFC	0x88 -— extended ID filter configuration
RSVD14	0x8C -— reserved
XIDAM	0x90 0x84 extended ID and mask
HPMS	0x94 0x88 high prioirty message status
NDAT1	0x98 -— new data 1
NDAT2	0x9C -— new data 2
RXF0C	0xA0 -— RX FIFO 0 configuration
RXF0S	0xA4 0x90 RX FIFO 0 status
RXF0A	0xA8 0x94 RX FIFO 0 Acknowledge
RXBC	0xAC -— RX buffer configuration
RXF1C	0xB0 -— RX FIFO 1 configuration
RXF1S	0xB4 0x98 RX FIFO 1 status
RXF1A	0xB8 0x9C RX FIFO 1 acknowledge
RXESC	0xBC -— RX buffer/FIFO element size configuration
TXBC	0xC0 0xC0 TX buffer configuration
TXFQS	0xC4 0xC4 TX FIFO/queue status
TXESC	0xC8 -— TX buffer element size configuration
TXBRP	0xCC 0xC8 TX buffer request pending
TXBAR	0xD0 0xCC TX buffer add request
TXBCR	0xD4 0xD0 TX buffer cancellation request
TXBTO	0xD8 0xD4 TX buffer transmission occurred
TXBCF	0xDC 0xD8 TX buffer cancellation finished
TXBTIE	0xE0 0xDC TX buffer transmission interrupt enable
TXBCIE	0xE4 0xE0 TX buffer cancellation finished interrupt enable
RSVD15	0xE8 -— reserved
RSVD16	0xEC -— reserved
TXEFC	0xF0 -— TX event FIFO configuration
TXEFS	0xF4 0xE4 TX event FIFO status
TXEFA	0xF8 0xE8 TX event FIFO acknowledge
RSVD17	reserved
MRAM	MRAM offset.
DEVICE_IDL	device ID "TCAN"
DEVICE_IDH	device ID "4550"
REVISION	silicon revision
STATUS	status
MODE	modes of operation and pin configurations
TIMESTAMP_PRESCALER	timestamp presacaler
TEST	read and write test registers, scratchpad
ECC	ECC error detection and testing.
INTERRUPT_STATUS	interrupt and diagnostic flags
MCAN_INTERRUPT_STATUS	interrupt flags related to MCAN core
INTERRUPT_ENABLE	interrupt and diagnostic flags
CREL	core release
ENDN	endianess
CUST	customer
DBTP	data bit timing and prescaler
TEST2	test
RWD	RAM watchdog.
CCCR	CC control.
NBTP	nominal bit timing and prescaler
TSCC	timestamp counter configuration
TSCV	timestamp counter value
TOCC	timeout counter configuration
TOCV	timeout counter value
RSVD1	reserved
RSVD2	reserved
RSVD3	reserved
RSVD4	reserved
ECR	error count
PSR	protocol status
TDCR	transmitter delay compensation
RSVD5	reserved
IR	interrupt status
IE	interrupt enable
ILS	interrupt line select
ILE	interrupt line enable
RSVD6	reserved
RSVD7	reserved
RSVD8	reserved
RSVD9	reserved
RSVD10	reserved
RSVD11	reserved
RSVD12	reserved
RSVD13	reserved
GFC	0x80 0x80 global filter configuration
SIDFC	0x84 -— standard ID filter configuration
XIDFC	0x88 -— extended ID filter configuration
RSVD14	0x8C -— reserved
XIDAM	0x90 0x84 extended ID and mask
HPMS	0x94 0x88 high prioirty message status
NDAT1	0x98 -— new data 1
NDAT2	0x9C -— new data 2
RXF0C	0xA0 -— RX FIFO 0 configuration
RXF0S	0xA4 0x90 RX FIFO 0 status
RXF0A	0xA8 0x94 RX FIFO 0 Acknowledge
RXBC	0xAC -— RX buffer configuration
RXF1C	0xB0 -— RX FIFO 1 configuration
RXF1S	0xB4 0x98 RX FIFO 1 status
RXF1A	0xB8 0x9C RX FIFO 1 acknowledge
RXESC	0xBC -— RX buffer/FIFO element size configuration
TXBC	0xC0 0xC0 TX buffer configuration
TXFQS	0xC4 0xC4 TX FIFO/queue status
TXESC	0xC8 -— TX buffer element size configuration
TXBRP	0xCC 0xC8 TX buffer request pending
TXBAR	0xD0 0xCC TX buffer add request
TXBCR	0xD4 0xD0 TX buffer cancellation request
TXBTO	0xD8 0xD4 TX buffer transmission occurred
TXBCF	0xDC 0xD8 TX buffer cancellation finished
TXBTIE	0xE0 0xDC TX buffer transmission interrupt enable
TXBCIE	0xE4 0xE0 TX buffer cancellation finished interrupt enable
RSVD15	0xE8 -— reserved
RSVD16	0xEC -— reserved
TXEFC	0xF0 -— TX event FIFO configuration
TXEFS	0xF4 0xE4 TX event FIFO status
TXEFA	0xF8 0xE8 TX event FIFO acknowledge
RSVD17	reserved
MRAM	MRAM offset.

Definition at line 184 of file TCAN4550Can.hxx.

Constructor & Destructor Documentation

◆ TCAN4550Can() [1/2]

TCAN4550Can::TCAN4550Can	(	const char *	name,
		void(*)()	interrupt_enable,
		void(*)()	interrupt_disable,
		const Gpio *	test_pin = `nullptr`
	)

inline

Constructor.

Parameters

name	name of this device instance in the file system
interrupt_enable	callback to enable the interrupt
interrupt_disable	callback to disable the interrupt
test_pin	test GPIO pin for instrumenting the code

Definition at line 61 of file MCAN.hxx.

◆ ~TCAN4550Can() [1/2]

TCAN4550Can::~TCAN4550Can ( )

inline

Destructor.

Definition at line 91 of file MCAN.hxx.

◆ TCAN4550Can() [2/2]

TCAN4550Can::TCAN4550Can	(	const char *	name,
		void(*)()	interrupt_enable,
		void(*)()	interrupt_disable,
		const Gpio *	test_pin = `nullptr`
	)

inline

Constructor.

Parameters

name	name of this device instance in the file system
interrupt_enable	callback to enable the interrupt
interrupt_disable	callback to disable the interrupt
test_pin	test GPIO pin for instrumenting the code

Definition at line 61 of file TCAN4550Can.hxx.

◆ ~TCAN4550Can() [2/2]

TCAN4550Can::~TCAN4550Can ( )

inline

Destructor.

Definition at line 91 of file TCAN4550Can.hxx.

Member Function Documentation

◆ disable() [1/2]

void TCAN4550Can::disable ( )

overrideprivatevirtual

function to disable device

Implements Can.

Definition at line 282 of file MCAN.cxx.

◆ disable() [2/2]

void TCAN4550Can::disable ( )

overrideprivatevirtual

function to disable device

Implements Can.

◆ enable() [1/2]

void TCAN4550Can::enable ( )

overrideprivatevirtual

function to enable device

Todo:: The stack size of 512 bytes was chosen based on the debugger reporting a high watter mark of 232 bytes used. The test platform was a CC3220 with GCC compiler (ARMv7m). It is likely that this high water mark will vary based on CPU architecture, and this stack size should probably be paramatizable in the future.

Implements Can.

Definition at line 225 of file MCAN.cxx.

◆ enable() [2/2]

void TCAN4550Can::enable ( )

overrideprivatevirtual

function to enable device

Implements Can.

◆ entry() [1/2]

void * TCAN4550Can::entry ( )

overrideprivatevirtual

User entry point for the created thread.

Returns: exit status

Todo:: The following sequence could be made more efficient by making a single 8-byte read transfer with the shadowed version of the IR register.

Reimplemented from OSThread.

Definition at line 639 of file MCAN.cxx.

◆ entry() [2/2]

void * TCAN4550Can::entry ( )

overrideprivatevirtual

User entry point for the created thread.

Returns: exit status

Reimplemented from OSThread.

◆ flush_buffers() [1/2]

void TCAN4550Can::flush_buffers ( )

overrideprivatevirtual

Called after disable.

Todo:: this could be made more efficeint, but does it matter?

Reimplemented from Can.

Definition at line 313 of file MCAN.cxx.

◆ flush_buffers() [2/2]

void TCAN4550Can::flush_buffers ( )

overrideprivatevirtual

Called after disable.

Reimplemented from Can.

◆ get_spi_bus_lock() [1/2]

OSMutex * TCAN4550Can::get_spi_bus_lock ( )

inline

Return a mutex that can be used by another SPI driver instance sharing the same bus as its bus lock.

Returns: a reference to a mutex that can be used as a bus lock

Definition at line 117 of file MCAN.hxx.

◆ get_spi_bus_lock() [2/2]

OSMutex * TCAN4550Can::get_spi_bus_lock ( )

inline

Return a mutex that can be used by another SPI driver instance sharing the same bus as its bus lock.

Returns: a reference to a mutex that can be used as a bus lock

Definition at line 117 of file TCAN4550Can.hxx.

◆ init() [1/2]

void TCAN4550Can::init	(	const char *	spi_name,
		uint32_t	freq,
		uint32_t	baud,
		uint16_t	rx_timeout_bits
	)

Initialize CAN device settings.

Typically called in hw_postinit(), not hw_preinit() or hw_init().

Parameters

spi_name	spi interface that the TCAN4550Can is on
freq	frequency in Hz that the TCAN4550 clock runs at
baud	target baud rate in Hz
rx_timeout_bits	timeout in CAN bit periods for rx interrupt

Definition at line 89 of file MCAN.cxx.

◆ init() [2/2]

void TCAN4550Can::init	(	const char *	spi_name,
		uint32_t	freq,
		uint32_t	baud,
		uint16_t	rx_timeout_bits
	)

Initialize CAN device settings.

Typically called in hw_postinit(), not hw_preinit() or hw_init().

Parameters

spi_name	spi interface that the TCAN4550Can is on
freq	frequency in Hz that the TCAN4550 clock runs at
baud	target baud rate in Hz
rx_timeout_bits	timeout in CAN bit periods for rx interrupt

◆ interrupt_handler() [1/2]

void TCAN4550Can::interrupt_handler ( )

inline

Handle an interrupt. Called by user provided interrupt handler.

Definition at line 106 of file MCAN.hxx.

◆ interrupt_handler() [2/2]

void TCAN4550Can::interrupt_handler ( )

inline

Handle an interrupt. Called by user provided interrupt handler.

Definition at line 106 of file TCAN4550Can.hxx.

◆ ioctl() [1/2]

int TCAN4550Can::ioctl	(	File *	file,
		unsigned long int	key,
		unsigned long	data
	)

overrideprivatevirtual

Request an ioctl transaction.

Parameters

file	file reference for this device
key	ioctl key
data	key data

Returns: >= 0 upon success, -errno upon failure

Reimplemented from NonBlockNode.

Definition at line 625 of file MCAN.cxx.

◆ ioctl() [2/2]

int TCAN4550Can::ioctl	(	File *	file,
		unsigned long int	key,
		unsigned long	data
	)

overrideprivatevirtual

Request an ioctl transaction.

Parameters

file	file reference for this device
key	ioctl key
data	key data

Returns: >= 0 upon success, -errno upon failure

Reimplemented from NonBlockNode.

◆ read() [1/2]

ssize_t TCAN4550Can::read	(	File *	file,
		void *	buf,
		size_t	count
	)

overrideprivatevirtual

Read from a file or device.

Parameters

file	file reference for this device
buf	location to place read data
count	number of bytes to read

Returns: number of bytes read upon success, -1 upon failure with errno containing the cause

Reimplemented from Can.

Definition at line 345 of file MCAN.cxx.

◆ read() [2/2]

ssize_t TCAN4550Can::read	(	File *	file,
		void *	buf,
		size_t	count
	)

overrideprivatevirtual

Read from a file or device.

Parameters

file	file reference for this device
buf	location to place read data
count	number of bytes to read

Returns: number of bytes read upon success, -1 upon failure with errno containing the cause

Reimplemented from Can.

◆ register_read() [1/2]

uint32_t TCAN4550Can::register_read ( Registers address )

inlineprivate

Read from a SPI register.

Parameters

address address to read from

Returns: data read

Definition at line 1036 of file MCAN.hxx.

◆ register_read() [2/2]

uint32_t TCAN4550Can::register_read ( Registers address )

inlineprivate

Read from a SPI register.

Parameters

address address to read from

Returns: data read

Definition at line 1036 of file TCAN4550Can.hxx.

◆ register_write() [1/2]

void TCAN4550Can::register_write	(	Registers	address,
		uint32_t	data
	)

inlineprivate

Write to a SPI register.

Parameters

address	address to write to
data	data to write

Definition at line 1062 of file MCAN.hxx.

◆ register_write() [2/2]

void TCAN4550Can::register_write	(	Registers	address,
		uint32_t	data
	)

inlineprivate

Write to a SPI register.

Parameters

address	address to write to
data	data to write

Definition at line 1062 of file TCAN4550Can.hxx.

◆ rxbuf_read() [1/2]

void TCAN4550Can::rxbuf_read	(	uint16_t	offset,
		MRAMRXBuffer *	buf,
		size_t	count
	)

inlineprivate

Read one or more RX buffers.

Parameters

offset	word offset in the MRAM to read from
buf	location to read into
count	number of buffers to read

Definition at line 1087 of file MCAN.hxx.

◆ rxbuf_read() [2/2]

void TCAN4550Can::rxbuf_read	(	uint16_t	offset,
		MRAMRXBuffer *	buf,
		size_t	count
	)

inlineprivate

Read one or more RX buffers.

Parameters

offset	word offset in the MRAM to read from
buf	location to read into
count	number of buffers to read

Definition at line 1087 of file TCAN4550Can.hxx.

◆ select() [1/2]

bool TCAN4550Can::select	(	File *	file,
		int	mode
	)

overrideprivatevirtual

Device select method.

Default impementation returns true.

Parameters

file	reference to the file
mode	FREAD for read active, FWRITE for write active, 0 for exceptions

Returns: true if active, false if inactive

Reimplemented from Can.

Definition at line 584 of file MCAN.cxx.

◆ select() [2/2]

bool TCAN4550Can::select	(	File *	file,
		int	mode
	)

overrideprivatevirtual

Device select method.

Default impementation returns true.

Parameters

file	reference to the file
mode	FREAD for read active, FWRITE for write active, 0 for exceptions

Returns: true if active, false if inactive

Reimplemented from Can.

◆ tx_msg() [1/2]

void TCAN4550Can::tx_msg ( )

inlineoverrideprivatevirtual

Function to try and transmit a message.

Implements Can.

Definition at line 1027 of file MCAN.hxx.

◆ tx_msg() [2/2]

void TCAN4550Can::tx_msg ( )

inlineoverrideprivatevirtual

Function to try and transmit a message.

Implements Can.

Definition at line 1027 of file TCAN4550Can.hxx.

◆ txbuf_write() [1/2]

void TCAN4550Can::txbuf_write	(	uint16_t	offset,
		MRAMTXBufferMultiWrite *	buf,
		size_t	count
	)

inlineprivate

Write one or more TX buffers.

Parameters

offset	word offset in the MRAM to write to
buf	location to write from
count	number of buffers to write

Definition at line 1115 of file MCAN.hxx.

◆ txbuf_write() [2/2]

void TCAN4550Can::txbuf_write	(	uint16_t	offset,
		MRAMTXBufferMultiWrite *	buf,
		size_t	count
	)

inlineprivate

Write one or more TX buffers.

Parameters

offset	word offset in the MRAM to write to
buf	location to write from
count	number of buffers to write

Definition at line 1115 of file TCAN4550Can.hxx.

◆ write() [1/2]

ssize_t TCAN4550Can::write	(	File *	file,
		const void *	buf,
		size_t	count
	)

overrideprivatevirtual

Write to a file or device.

Parameters

file	file reference for this device
buf	location to find write data
count	number of bytes to write

Returns: number of bytes written upon success, -1 upon failure with errno containing the cause

Todo:: It is possible that the tramsmit FIFO writes which follow will be stuck in the FIFO until we pass through this code again (could be another time time through the loop or a future call to TCAN4550Can::write()). This could be a long time, resulting in stale data going out on the bus once the error state is removed. A possible future enhancement would be to use the MCAN timeout counter to flush the FIFO again when it expires (suggested 3 second timeout).

Reimplemented from Can.

Definition at line 449 of file MCAN.cxx.

◆ write() [2/2]

ssize_t TCAN4550Can::write	(	File *	file,
		const void *	buf,
		size_t	count
	)

overrideprivatevirtual

Write to a file or device.

Parameters

file	file reference for this device
buf	location to find write data
count	number of bytes to write

Returns: number of bytes written upon success, -1 upon failure with errno containing the cause

Reimplemented from Can.

Member Data Documentation

◆ BAUD_TABLE

static const TCAN4550Baud TCAN4550Can::BAUD_TABLE

staticprivate

Initial value:

=
{
    
    {20000000, 125000, {(3 - 1), (4 - 1), (11 - 1), (10 - 1)}},
    
    {40000000, 125000, {(3 - 1), (4 - 1), (11 - 1), (20 - 1)}},
}

shadow for the transmit complete buffer mask

Definition at line 1143 of file MCAN.hxx.

◆ txPending_

uint8_t TCAN4550Can::txPending_

private

waiting on a TX active event

Definition at line 1149 of file MCAN.hxx.

The documentation for this class was generated from the following files:

Classes

Public Member Functions

Private Types

Private Member Functions

Private Attributes

Static Private Attributes

Additional Inherited Members

Detailed Description

Member Enumeration Documentation

◆ Command [1/2]

◆ Command [2/2]

◆ Registers [1/2]

◆ Registers [2/2]

Constructor & Destructor Documentation

◆ TCAN4550Can() [1/2]

◆ ~TCAN4550Can() [1/2]

◆ TCAN4550Can() [2/2]

◆ ~TCAN4550Can() [2/2]

Member Function Documentation

◆ disable() [1/2]

◆ disable() [2/2]

◆ enable() [1/2]

◆ enable() [2/2]

◆ entry() [1/2]

◆ entry() [2/2]

◆ flush_buffers() [1/2]

◆ flush_buffers() [2/2]

◆ get_spi_bus_lock() [1/2]

◆ get_spi_bus_lock() [2/2]

◆ init() [1/2]

◆ init() [2/2]

◆ interrupt_handler() [1/2]

◆ interrupt_handler() [2/2]

◆ ioctl() [1/2]

◆ ioctl() [2/2]

◆ read() [1/2]

◆ read() [2/2]

◆ register_read() [1/2]

◆ register_read() [2/2]

◆ register_write() [1/2]

◆ register_write() [2/2]

◆ rxbuf_read() [1/2]

◆ rxbuf_read() [2/2]

◆ select() [1/2]

◆ select() [2/2]

◆ tx_msg() [1/2]

◆ tx_msg() [2/2]

◆ txbuf_write() [1/2]

◆ txbuf_write() [2/2]

◆ write() [1/2]

◆ write() [2/2]

Member Data Documentation

◆ BAUD_TABLE

◆ interruptDisable_

◆ interruptEnable_

◆ mcanInterruptEnable_

◆ MRAM_ADDR_OFFSET

◆ MRAM_SIZE_WORDS

◆ RX_FIFO_0_MRAM_ADDR

◆ RX_FIFO_SIZE

◆ rxPending_

◆ sem_

◆ spi_

◆ SPI_MAX_SPEED_HZ

◆ spiFd_

◆ state_

◆ TX_BUFFERS_MRAM_ADDR

◆ TX_DEDICATED_BUFFER_COUNT

◆ TX_EVENT_FIFO_MRAM_ADDR

◆ TX_EVENT_FIFO_SIZE

◆ TX_FIFO_BUFFERS_MASK

◆ TX_FIFO_BUFFERS_MRAM_ADDR

◆ TX_FIFO_SIZE

◆ txBufferMultiWrite_

◆ txCompleteMask_

◆ txPending_