MCAN interrupt registers (IR, IE, and ILS) definition. More...

Public Member Functions
	MCANInterrupt ()
	Constructor. Sets the reset value.

	MCANInterrupt ()
	Constructor. Sets the reset value.

Public Attributes
union {

uint32_t data
	raw word value More...

struct {

uint32_t rf0n: 1
	RX FIFO 0 new message. More...

uint32_t rf0w: 1
	RX FIFO 0 watermark reached. More...

uint32_t rf0f: 1
	RX FIFO 0 full. More...

uint32_t rf0l: 1
	RX FIFO 0 message lost. More...

uint32_t rf1n: 1
	RX FIFO 1 new message. More...

uint32_t rf1w: 1
	RX FIFO 1 watermark reached. More...

uint32_t rf1f: 1
	RX FIFO 1 full. More...

uint32_t rf1l: 1
	RX FIFO 1 message lost. More...

uint32_t hpm: 1
	high priority message More...

uint32_t tc: 1
	transmission completed More...

uint32_t tcf: 1
	transmission cancellation finished More...

uint32_t tfe: 1
	TX FIFO empty. More...

uint32_t tefn: 1
	TX event FIFO new entry. More...

uint32_t tefw: 1
	TX event FIFO watermark reached. More...

uint32_t teff: 1
	TX event FIFO full. More...

uint32_t tefl: 1
	TX event FIFO event lost. More...

uint32_t tsw: 1
	timestamp wraparound More...

uint32_t mraf: 1
	message RAM access failure More...

uint32_t too: 1
	timeout occurred More...

uint32_t drx: 1
	message stored to dedicated RX buffer More...

uint32_t bec: 1
	bit error corrected More...

uint32_t beu: 1
	bit error uncorrected More...

uint32_t elo: 1
	error logging overflow More...

uint32_t ep: 1
	error passive More...

uint32_t ew: 1
	warning status More...

uint32_t bo: 1
	bus-off status More...

uint32_t wdi: 1
	watchdog More...

uint32_t pea: 1
	protocol error in arbitration phase More...

uint32_t ped: 1
	protocol error in data phase More...

uint32_t ara: 1
	access to reserved address More...

uint32_t rsvd: 2
	reserved More...

}

};

union {

uint32_t data
	raw word value More...

struct {

uint32_t rf0n: 1
	RX FIFO 0 new message. More...

uint32_t rf0w: 1
	RX FIFO 0 watermark reached. More...

uint32_t rf0f: 1
	RX FIFO 0 full. More...

uint32_t rf0l: 1
	RX FIFO 0 message lost. More...

uint32_t rf1n: 1
	RX FIFO 1 new message. More...

uint32_t rf1w: 1
	RX FIFO 1 watermark reached. More...

uint32_t rf1f: 1
	RX FIFO 1 full. More...

uint32_t rf1l: 1
	RX FIFO 1 message lost. More...

uint32_t hpm: 1
	high priority message More...

uint32_t tc: 1
	transmission completed More...

uint32_t tcf: 1
	transmission cancellation finished More...

uint32_t tfe: 1
	TX FIFO empty. More...

uint32_t tefn: 1
	TX event FIFO new entry. More...

uint32_t tefw: 1
	TX event FIFO watermark reached. More...

uint32_t teff: 1
	TX event FIFO full. More...

uint32_t tefl: 1
	TX event FIFO event lost. More...

uint32_t tsw: 1
	timestamp wraparound More...

uint32_t mraf: 1
	message RAM access failure More...

uint32_t too: 1
	timeout occurred More...

uint32_t drx: 1
	message stored to dedicated RX buffer More...

uint32_t bec: 1
	bit error corrected More...

uint32_t beu: 1
	bit error uncorrected More...

uint32_t elo: 1
	error logging overflow More...

uint32_t ep: 1
	error passive More...

uint32_t ew: 1
	warning status More...

uint32_t bo: 1
	bus-off status More...

uint32_t wdi: 1
	watchdog More...

uint32_t pea: 1
	protocol error in arbitration phase More...

uint32_t ped: 1
	protocol error in data phase More...

uint32_t ara: 1
	access to reserved address More...

uint32_t rsvd: 2
	reserved More...

}

};

Detailed Description

MCAN interrupt registers (IR, IE, and ILS) definition.

Definition at line 786 of file MCAN.hxx.

Constructor & Destructor Documentation

◆ MCANInterrupt() [1/2]

TCAN4550Can::MCANInterrupt::MCANInterrupt ( )

inline

Constructor. Sets the reset value.

Definition at line 789 of file MCAN.hxx.

◆ MCANInterrupt() [2/2]

TCAN4550Can::MCANInterrupt::MCANInterrupt ( )

inline

Constructor. Sets the reset value.

Definition at line 789 of file TCAN4550Can.hxx.

Member Data Documentation

◆ ara

uint32_t TCAN4550Can::MCANInterrupt::ara

access to reserved address

Definition at line 831 of file MCAN.hxx.

◆ bec

uint32_t TCAN4550Can::MCANInterrupt::bec

bit error corrected

Definition at line 821 of file MCAN.hxx.

◆ beu

uint32_t TCAN4550Can::MCANInterrupt::beu

bit error uncorrected

Definition at line 822 of file MCAN.hxx.

◆ bo

uint32_t TCAN4550Can::MCANInterrupt::bo

bus-off status

Definition at line 827 of file MCAN.hxx.

◆ data

uint32_t TCAN4550Can::MCANInterrupt::data

raw word value

Definition at line 796 of file MCAN.hxx.

◆ drx

uint32_t TCAN4550Can::MCANInterrupt::drx

message stored to dedicated RX buffer

Definition at line 820 of file MCAN.hxx.

◆ elo

uint32_t TCAN4550Can::MCANInterrupt::elo

error logging overflow

Definition at line 823 of file MCAN.hxx.

◆ ep

uint32_t TCAN4550Can::MCANInterrupt::ep

error passive

Definition at line 824 of file MCAN.hxx.

◆ ew

uint32_t TCAN4550Can::MCANInterrupt::ew

warning status

Definition at line 826 of file MCAN.hxx.

◆ hpm

uint32_t TCAN4550Can::MCANInterrupt::hpm

high priority message

Definition at line 808 of file MCAN.hxx.

◆ mraf

uint32_t TCAN4550Can::MCANInterrupt::mraf

message RAM access failure

Definition at line 818 of file MCAN.hxx.

◆ pea

uint32_t TCAN4550Can::MCANInterrupt::pea

protocol error in arbitration phase

Definition at line 829 of file MCAN.hxx.

◆ ped

uint32_t TCAN4550Can::MCANInterrupt::ped

protocol error in data phase

Definition at line 830 of file MCAN.hxx.

◆ rf0f

uint32_t TCAN4550Can::MCANInterrupt::rf0f

RX FIFO 0 full.

Definition at line 801 of file MCAN.hxx.

◆ rf0l

uint32_t TCAN4550Can::MCANInterrupt::rf0l

RX FIFO 0 message lost.

Definition at line 802 of file MCAN.hxx.

◆ rf0n

uint32_t TCAN4550Can::MCANInterrupt::rf0n

RX FIFO 0 new message.

Definition at line 799 of file MCAN.hxx.

◆ rf0w

uint32_t TCAN4550Can::MCANInterrupt::rf0w

RX FIFO 0 watermark reached.

Definition at line 800 of file MCAN.hxx.

◆ rf1f

uint32_t TCAN4550Can::MCANInterrupt::rf1f

RX FIFO 1 full.

Definition at line 805 of file MCAN.hxx.

◆ rf1l

uint32_t TCAN4550Can::MCANInterrupt::rf1l

RX FIFO 1 message lost.

Definition at line 806 of file MCAN.hxx.

◆ rf1n

uint32_t TCAN4550Can::MCANInterrupt::rf1n

RX FIFO 1 new message.

Definition at line 803 of file MCAN.hxx.

◆ rf1w

uint32_t TCAN4550Can::MCANInterrupt::rf1w

RX FIFO 1 watermark reached.

Definition at line 804 of file MCAN.hxx.

◆ rsvd

uint32_t TCAN4550Can::MCANInterrupt::rsvd

reserved

Definition at line 832 of file MCAN.hxx.

◆ tc

uint32_t TCAN4550Can::MCANInterrupt::tc

transmission completed

Definition at line 809 of file MCAN.hxx.

◆ tcf

uint32_t TCAN4550Can::MCANInterrupt::tcf

transmission cancellation finished

Definition at line 810 of file MCAN.hxx.

◆ teff

uint32_t TCAN4550Can::MCANInterrupt::teff

TX event FIFO full.

Definition at line 814 of file MCAN.hxx.

◆ tefl

uint32_t TCAN4550Can::MCANInterrupt::tefl

TX event FIFO event lost.

Definition at line 815 of file MCAN.hxx.

◆ tefn

uint32_t TCAN4550Can::MCANInterrupt::tefn

TX event FIFO new entry.

Definition at line 812 of file MCAN.hxx.

◆ tefw

uint32_t TCAN4550Can::MCANInterrupt::tefw

TX event FIFO watermark reached.

Definition at line 813 of file MCAN.hxx.

◆ tfe

uint32_t TCAN4550Can::MCANInterrupt::tfe

TX FIFO empty.

Definition at line 811 of file MCAN.hxx.

◆ too

uint32_t TCAN4550Can::MCANInterrupt::too

timeout occurred

Definition at line 819 of file MCAN.hxx.

◆ tsw

uint32_t TCAN4550Can::MCANInterrupt::tsw

timestamp wraparound

Definition at line 817 of file MCAN.hxx.

◆ wdi

uint32_t TCAN4550Can::MCANInterrupt::wdi

watchdog

Definition at line 828 of file MCAN.hxx.

The documentation for this struct was generated from the following files:

Public Member Functions

Public Attributes