MCP2515Can.hxx

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#ifndef _FREERTOS_DRIVERS_COMMON_MCP2515CAN_HXX_
#define _FREERTOS_DRIVERS_COMMON_MCP2515CAN_HXX_
 
#include <unistd.h>
#include <cstddef>
 
#include "Can.hxx"
#include "SPI.hxx"
 
#include "os/Gpio.hxx"
#include "os/OS.hxx"
 
#include "can_ioctl.h"
 
#define MCP2515_DEBUG 0
#define MCP2515_NULL_TX 0
 
class MCP2515GPO;
class MCP2515GPI;
 
class MCP2515Can : public Can, public OSThread
{
public:
    MCP2515Can(const char *name,
               void (*interrupt_enable)(), void (*interrupt_disable)())
        : Can(name)
        , OSThread()
        , interruptEnable_(interrupt_enable)
        , interruptDisable_(interrupt_disable)
        , state_(CAN_STATE_STOPPED)
        , txPending_(0)
        , gpoData_(0x0)
        , gpiData_(0x7)
        , ioPending_(false)
        , spiFd_(-1)
        , spi_(nullptr)
        , sem_()
    {
    }
 
    ~MCP2515Can()
    {
    }
 
    void init(const char *spi_name, uint32_t freq, uint32_t baud);
 
    void interrupt_handler();
 
    OSMutex *get_spi_bus_lock()
    {
        return &lock_;
    }
 
private:
    static constexpr uint32_t SPI_MAX_SPEED_HZ = 10000000;
 
    enum Registers
    {
        RXF0SIDH = 0,
        RXF0SIDL,
        RXF0SEID8,
        RXF0EID0,
        RXF1SIDH,
        RXF1SIDL,
        RXF1SEID8,
        RXF1EID0,
        RXF2SIDH,
        RXF2SIDL,
        RXF2SEID8,
        RXF2EID0,
        BFPCTRL,
        TXRTSCTRL, 
        CANSTAT,   
        CANCTRL,   
        RXF3SIDH = 16,
        RXF3SIDL,
        RXF3EID8,
        RXF3EID0,
        RXF4SIDH,
        RXF4SIDL,
        RXF4EID8,
        RXF4EID0,
        RXF5SIDH,
        RXF5SIDL,
        RXF5EID8,
        RXF5EID0,
        TEC,      
        RED,      
        RXM0SIDH = 32,
        RXM0SIDL,
        RXM0EID8,
        RXM0EID0,
        RXM1SIDH,
        RXM1SIDL,
        RXM1EID8,
        RXM1EID0,
        CNF3,     
        CNF2,     
        CNF1,     
        CANINTE,  
        CANINTF,  
        EFLG,     
        TXB0CTRL = 48,
        TXB0SIDH,
        TXB0SIDL,
        TXB0EID8,
        TXB0EID0,
        TXB0DLC,
        TXB0D0,
        TXB0D1,
        TXB0D2,
        TXB0D3,
        TXB0D4,
        TXB0D5,
        TXB0D6,
        TXB0D7,
 
        TXB1CTRL = 64,
        TXB1SIDH,
        TXB1SIDL,
        TXB1EID8,
        TXB1EID0,
        TXB1DLC,
        TXB1D0,
        TXB1D1,
        TXB1D2,
        TXB1D3,
        TXB1D4,
        TXB1D5,
        TXB1D6,
        TXB1D7,
 
        TXB2CTRL = 80,
        TXB2SIDH,
        TXB2SIDL,
        TXB2EID8,
        TXB2EID0,
        TXB2DLC,
        TXB2D0,
        TXB2D1,
        TXB2D2,
        TXB2D3,
        TXB2D4,
        TXB2D5,
        TXB2D6,
        TXB2D7,
 
        RXB0CTRL = 96,
        RXB0SIDH,
        RXB0SIDL,
        RXB0EID8,
        RXB0EID0,
        RXB0DLC,
        RXB0D0,
        RXB0D1,
        RXB0D2,
        RXB0D3,
        RXB0D4,
        RXB0D5,
        RXB0D6,
        RXB0D7,
 
        RXB1CTRL = 112,
        RXB1SIDH,
        RXB1SIDL,
        RXB1EID8,
        RXB1EID0,
        RXB1DLC,
        RXB1D0,
        RXB1D1,
        RXB1D2,
        RXB1D3,
        RXB1D4,
        RXB1D5,
        RXB1D6,
        RXB1D7,
    };
 
    enum ControlFields
    {
        CLKPRE = 0x03, 
        CLKEN  = 0x04, 
        OSM    = 0x08, 
        ABAT   = 0x10, 
        REQOP  = 0xE0, 
    };
 
    enum InterruptFlags
    {
        RX0I = 0x01, 
        RX1I = 0x02, 
        TX0I = 0x04, 
        TX1I = 0x08, 
        TX2I = 0x10, 
        ERRI = 0x20, 
        WAKI = 0x40, 
        MERR = 0x80, 
    };
 
    enum ErrorFlags
    {
        EWARN  = 0x01, 
        RXWARN = 0x02, 
        TXWARN = 0x04, 
        RXEP   = 0x08, 
        TXEP   = 0x10, 
        TXBO   = 0x20, 
        RX0OVR = 0x40, 
        RX1OVR = 0x80, 
    };
 
    enum Instructions
    {
        RESET       = 0xC0, 
        READ        = 0x03, 
        READ_RX_BUF = 0x90, 
        WRITE       = 0x02, 
        LOAD_TX_BUF = 0x40, 
        STATUS      = 0xA0, 
        RX_STATUS   = 0xB0, 
        RTS         = 0x80, 
        BIT_MODIFY  = 0x05, 
    };
 
    struct Config1
    {
        Config1(uint8_t brp, uint8_t sjw)
            : brp_(brp)
            , sjw_(sjw)
        {
        }
 
        union
        {
            uint8_t data_; 
            struct
            {
                uint8_t brp_ : 6; 
                uint8_t sjw_ : 2; 
            };
        };
    };
 
    struct Config2
    {
        Config2(uint8_t prseg, uint8_t prseg1, uint8_t sam, uint8_t bltmode)
            : prseg_(prseg)
            , prseg1_(prseg1)
            , sam_(sam)
            , bltmode_(bltmode)
        {
        }
 
        union
        {
            uint8_t data_; 
            struct
            {
                uint8_t prseg_   : 3; 
                uint8_t prseg1_  : 3; 
                uint8_t sam_     : 1; 
                uint8_t bltmode_ : 1; 
            };
        };
    };
 
    struct Config3
    {
        Config3(uint8_t phseg2, uint8_t wakfil, uint8_t sof)
            : phseg2_(phseg2)
            , unused_(0)
            , wakfil_(wakfil)
            , sof_(sof)
        {
        }
 
        union
        {
            uint8_t data_; 
            struct
            {
                uint8_t phseg2_ : 3; 
                uint8_t unused_ : 3; 
                uint8_t wakfil_ : 1; 
                uint8_t sof_    : 1; 
            };
        };
    };
 
    struct MCP2515Baud
    {
        uint32_t freq_; 
        uint32_t baud_; 
        Config1 cnf1_; 
        Config2 cnf2_; 
        Config3 cnf3_; 
    };
 
    class Buffer
    {
    public:
        static const size_t TRANSFER_SIZE = 14;
 
        __attribute__((optimize("-O3")))
        void build_struct_can_frame(struct can_frame *can_frame)
        {
            can_frame->can_eff = exide_;
            if (LIKELY(exide_))
            {
                /* extended frame */
                can_frame->can_rtr = rtr_;
                can_frame->can_id = ((uint32_t)eid0_ <<  0) +
                                    ((uint32_t)eid8_ <<  8) +
                                    ((uint32_t)eid_  << 16) +
                                    ((uint32_t)sid_  << 18) +
                                    ((uint32_t)sidh_ << 21);
            }
            else
            {
                /* standard frame */
                can_frame->can_rtr = srr_;
                can_frame->can_id = ((uint32_t)sid_  << 0) +
                                    ((uint32_t)sidh_ << 3);
            }
            can_frame->can_err = 0;
            can_frame->can_dlc = dlc_;
            static_assert(offsetof(Buffer, data_) == 8, "data_ misaligned");
            can_frame->data64 = data64_;
        }
 
        void *get_payload()
        {
            return &command_;
        }
 
    protected:
        __attribute__((optimize("-O3")))
        Buffer(struct can_frame *can_frame, uint8_t command)
            : command_(command)
            , dlc_(can_frame->can_dlc)
            , rtr_(can_frame->can_rtr)
        {
            if (LIKELY(can_frame->can_eff))
            {
                sidh_ = (can_frame->can_id & 0x1FE00000) >> 21;
                eid_ = (can_frame->can_id & 0x00030000) >> 16;
                exide_ = 1;
                sid_ = (can_frame->can_id & 0x001C0000) >> 18;
                eid8_ = (can_frame->can_id & 0x0000FF00) >> 8;
                eid0_ = (can_frame->can_id & 0x000000FF) >> 0;
            }
            else
            {
                sidh_ = (can_frame->can_id & 0x000007F8) >> 3;
                eid_ = 0;
                exide_ = 0;
                sid_ = (can_frame->can_id & 0x000007F8) >> 3;
                eid8_ = 0;
                eid0_ = 0;
            }
            static_assert(offsetof(Buffer, data_) == 8, "data_ misaligned");
            data64_ = can_frame->data64;
        }
 
        Buffer( uint8_t command)
            : command_(command)
        {
        }
 
        uint8_t pad_[2];          
        uint8_t command_;         
        uint8_t sidh_;            
        struct
        {
            uint8_t eid_     : 2; 
            uint8_t unused1_ : 1; 
            uint8_t exide_   : 1; 
            uint8_t srr_     : 1; 
            uint8_t sid_     : 3; 
        };
        uint8_t eid8_;            
        uint8_t eid0_;            
        struct
        {
            uint8_t dlc_     : 4; 
            uint8_t unused3_ : 2; 
            uint8_t rtr_     : 1; 
            uint8_t unused4_ : 1; 
        };
        union
        {
            uint64_t data64_; 
            uint8_t  data_[8];     
        };
    };
 
    class BufferRead : public Buffer
    {
    public:
        BufferRead(int index)
            : Buffer(READ_RX_BUF | (index == 0 ? 0x00 : 0x04))
        {
        }
    };
 
    class BufferWrite : public Buffer
    {
    public:
        BufferWrite(int index, struct can_frame *can_frame)
            : Buffer(can_frame, LOAD_TX_BUF + (index << 1))
        {
        }
    };
 
    int ioctl(File *file, unsigned long int key, unsigned long data) override;
 
    void *entry() override; 
    void enable() override; 
    void disable() override; 
    __attribute__((optimize("-O3")))
    void tx_msg() override
    {
        /* The caller has us in a critical section, we need to exchange a
         * critical section lock for a mutex lock since event handling happens
         * in thread context and not in interrupt context like it would in a
         * typical CAN device driver.
         */
        portEXIT_CRITICAL();
        lock_.lock();
        tx_msg_locked();
        lock_.unlock();
        portENTER_CRITICAL();
    }
 
    void tx_msg_locked();
 
    void reset()
    {
        spi_ioc_transfer xfer;
        uint8_t reset = RESET;
 
        xfer.tx_buf = (unsigned long)&reset;
        xfer.rx_buf = 0;
        xfer.len = sizeof(reset);
 
        spi_->transfer_with_cs_assert_polled(&xfer);
    }
 
    __attribute__((optimize("-O3")))
    uint8_t register_read(Registers address)
    {
        spi_ioc_transfer xfer;
        uint8_t data[3] = {READ, address, 0};
 
        xfer.tx_buf = (unsigned long)data;
        xfer.rx_buf = (unsigned long)data;
        xfer.len = sizeof(data);
 
        spi_->transfer_with_cs_assert_polled(&xfer);
 
        return data[2];
    }
 
    __attribute__((optimize("-O3")))
    void register_write(Registers address, uint8_t data)
    {
        spi_ioc_transfer xfer;
        uint8_t payload[] = {WRITE, address, data};
 
        xfer.tx_buf = (unsigned long)payload;
        xfer.rx_buf = 0;
        xfer.len = sizeof(payload);
 
        spi_->transfer_with_cs_assert_polled(&xfer);
    }
 
    void bit_modify(Registers address, uint8_t data, uint8_t mask)
    {
        spi_ioc_transfer xfer;
        uint8_t payload[] = {BIT_MODIFY, address, mask, data};
 
        xfer.tx_buf = (unsigned long)payload;
        xfer.rx_buf = 0;
        xfer.len = sizeof(payload);
        spi_->transfer_with_cs_assert_polled(&xfer);
    }
 
    void buffer_read(BufferRead *buf)
    {
        spi_ioc_transfer xfer;
        xfer.tx_buf = (unsigned long)buf->get_payload();
        xfer.rx_buf = (unsigned long)buf->get_payload();
        xfer.len = buf->TRANSFER_SIZE;
        spi_->transfer_with_cs_assert_polled(&xfer);
    }
 
    void buffer_write(BufferWrite *buf, struct can_frame *can_frame)
    {
        spi_ioc_transfer xfer;
        xfer.tx_buf = (unsigned long)buf->get_payload();
        xfer.rx_buf = 0;
        xfer.len = buf->TRANSFER_SIZE;
        spi_->SPI::transfer_with_cs_assert_polled(&xfer);
    }
 
    void request_gpio_operation()
    {
        if (!ioPending_)
        {
            ioPending_ = true;
            sem_.post();
        }
    }
 
    void (*interruptEnable_)(); 
    void (*interruptDisable_)(); 
    unsigned state_     : 4; 
    unsigned txPending_ : 2; 
    unsigned gpoData_   : 2; 
    unsigned gpiData_   : 3; 
    unsigned ioPending_ : 1; 
    int spiFd_; 
    SPI *spi_; 
    OSSem sem_; 
#if MCP2515_DEBUG
    volatile uint8_t regs_[128]; 
#endif
 
    static const MCP2515Baud BAUD_TABLE[];
 
    MCP2515Can();
 
    friend class MCP2515GPO;
 
    friend class MCP2515GPI;
 
    DISALLOW_COPY_AND_ASSIGN(MCP2515Can);
};
 
class MCP2515GPO : public Gpio
{
public:
    MCP2515GPO(MCP2515Can *instance, uint8_t bit)
        : Gpio()
        , instance_(instance)
        , bit_(bit)
    {
        HASSERT(bit < 2);
    }
 
    void write(Value new_state) const override
    {
        new_state ? set() : clr();
    }
 
    Value read() const override
    {
        return instance_->gpoData_ & (0x1 << bit_) ? Gpio::SET : Gpio::CLR;
    }
 
    void set() const override
    {
        if (!(instance_->gpoData_ & (0x1 << bit_)))
        {
            portENTER_CRITICAL();
            instance_->gpoData_ |= 0x1 << bit_;
            portEXIT_CRITICAL();
            instance_->request_gpio_operation();
        }
    }
 
    void clr() const override
    {
        if ((instance_->gpoData_ & (0x1 << bit_)))
        {
            portENTER_CRITICAL();
            instance_->gpoData_ &= ~(0x1 << bit_);
            portEXIT_CRITICAL();
            instance_->request_gpio_operation();
        }
    }
 
    void set_direction(Gpio::Direction dir) const override
    {
        HASSERT(dir == Gpio::Direction::DOUTPUT);
    }
 
    Direction direction() const override
    {
        return Gpio::Direction::DOUTPUT;
    }
 
private:
    MCP2515Can *instance_;
 
    uint8_t bit_;
 
    DISALLOW_COPY_AND_ASSIGN(MCP2515GPO);
};
 
class MCP2515GPI : public Gpio
{
public:
    MCP2515GPI(MCP2515Can *instance, uint8_t bit)
        : Gpio()
        , instance_(instance)
        , bit_(bit)
    {
        HASSERT(bit < 3);
    }
 
    Value read() const override
    {
        instance_->request_gpio_operation();
        return instance_->gpiData_ & (0x1 << bit_) ? Gpio::SET : Gpio::CLR;
    }
 
    void set_direction(Gpio::Direction dir) const override
    {
        HASSERT(dir == Gpio::Direction::DINPUT);
    }
 
    Direction direction() const override
    {
        return Gpio::Direction::DINPUT;
    }
 
private:
    MCP2515Can *instance_;
 
    uint8_t bit_;
 
    DISALLOW_COPY_AND_ASSIGN(MCP2515GPI);
};
 
#endif /* _FREERTOS_DRIVERS_COMMON_MCP2515CAN_HXX_ */