TivaNRZ.hxx

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#include "TivaDCC.hxx" // for FixedQueue
 
/*
struct DCCDecode
{
    static const auto TIMER_BASE = WTIMER4_BASE;
    static const auto TIMER_PERIPH = SYSCTL_PERIPH_WTIMER4;
    static const auto TIMER_INTERRUPT = INT_WTIMER4A;
    static const auto TIMER = TIMER_A;
    static const auto CFG_CAP_TIME_UP =
        TIMER_CFG_SPLIT_PAIR | TIMER_CFG_A_CAP_TIME_UP | TIMER_CFG_B_ONE_SHOT;
    // Interrupt bits.
    static const auto TIMER_CAP_EVENT = TIMER_CAPA_EVENT;
    static const auto TIMER_TIM_TIMEOUT = TIMER_TIMA_TIMEOUT;
 
    static const auto OS_INTERRUPT = INT_WTIMER4B;
    DECL_PIN(NRZPIN, D, 4);
    static const auto NRZPIN_CONFIG = GPIO_PD4_WT4CCP0;
 
    static const uint32_t TIMER_MAX_VALUE = 0x8000000UL;
 
    static const int Q_SIZE = 16;
 
};
*/
 
template <class HW> class TivaNRZ : public Node
{
public:
    TivaNRZ(const char *name);
 
    ~TivaNRZ()
    {
    }
 
    inline void interrupt_handler() __attribute__((always_inline));
 
    inline void os_interrupt_handler() __attribute__((always_inline));
 
private:
    ssize_t read(File *file, void *buf, size_t count) OVERRIDE;
 
    ssize_t write(File *file, const void *buf, size_t count) OVERRIDE
    {
        return -EINVAL;
    }
 
    int ioctl(File *file, unsigned long int key, unsigned long data) OVERRIDE;
 
    void enable();  
    void disable(); 
    void flush_buffers()
    {
        while (!inputData_.empty())
        {
            inputData_.increment_front();
        }
    };
 
    FixedQueue<uint32_t, HW::Q_SIZE> inputData_;
    uint32_t lastTimerValue_;
    uint32_t reloadCount_;
    unsigned lastLevel_;
    bool overflowed_ = false;
    Notifiable *readableNotifiable_ = nullptr;
 
    DISALLOW_COPY_AND_ASSIGN(TivaNRZ);
};
 
template <class HW>
TivaNRZ<HW>::TivaNRZ(const char *name)
    : Node(name)
{
    MAP_SysCtlPeripheralEnable(HW::TIMER_PERIPH);
    MAP_SysCtlPeripheralEnable(HW::NRZPIN_PERIPH);
    MAP_GPIOPinConfigure(HW::NRZPIN_CONFIG);
    MAP_GPIOPinTypeTimer(HW::NRZPIN_BASE, HW::NRZPIN_PIN);
 
    disable();
}
 
template <class HW> void TivaNRZ<HW>::enable()
{
    disable();
    MAP_TimerClockSourceSet(HW::TIMER_BASE, TIMER_CLOCK_SYSTEM);
    MAP_TimerConfigure(HW::TIMER_BASE, HW::CFG_CAP_TIME_UP);
    MAP_TimerControlStall(HW::TIMER_BASE, HW::TIMER, true);
    MAP_TimerControlEvent(HW::TIMER_BASE, HW::TIMER, TIMER_EVENT_BOTH_EDGES);
    MAP_TimerLoadSet(HW::TIMER_BASE, HW::TIMER, HW::TIMER_MAX_VALUE);
    MAP_TimerPrescaleSet(HW::TIMER_BASE, HW::TIMER, HW::PS_MAX);
 
    reloadCount_ = 0;
    lastTimerValue_ = 0;
 
    MAP_TimerIntEnable(HW::TIMER_BASE, HW::TIMER_CAP_EVENT);
    MAP_TimerIntEnable(HW::TIMER_BASE, HW::TIMER_TIM_TIMEOUT);
 
    MAP_IntPrioritySet(HW::TIMER_INTERRUPT, 0);
    MAP_IntPrioritySet(HW::OS_INTERRUPT, configKERNEL_INTERRUPT_PRIORITY);
    MAP_IntEnable(HW::OS_INTERRUPT);
    MAP_IntEnable(HW::TIMER_INTERRUPT);
 
    MAP_TimerEnable(HW::TIMER_BASE, HW::TIMER);
}
 
template <class HW> void TivaNRZ<HW>::disable()
{
    MAP_IntDisable(HW::TIMER_INTERRUPT);
    MAP_IntDisable(HW::OS_INTERRUPT);
    MAP_TimerDisable(HW::TIMER_BASE, HW::TIMER);
}
 
template <class HW>
__attribute__((optimize("-O3"))) void TivaNRZ<HW>::interrupt_handler()
{
    // get masked interrupt status
    auto status = MAP_TimerIntStatus(HW::TIMER_BASE, true);
    if (status & HW::TIMER_TIM_TIMEOUT)
    {
        // The timer got reloaded.
        reloadCount_++;
        MAP_TimerIntClear(HW::TIMER_BASE, HW::TIMER_TIM_TIMEOUT);
    }
    // TODO(balazs.racz): Technically it is possible that the timer reload
    // happens between the event match and the interrupt entry. In this case we
    // will incorrectly add a full cycle to the event length.
    if (status & HW::TIMER_CAP_EVENT)
    {
        MAP_TimerIntClear(HW::TIMER_BASE, HW::TIMER_CAP_EVENT);
        MAP_GPIOPinWrite(GPIO_PORTA_BASE, GPIO_PIN_0, 0);
        static uint32_t raw_new_value;
        raw_new_value = MAP_TimerValueGet(HW::TIMER_BASE, HW::TIMER);
        static uint32_t new_value;
        new_value = raw_new_value;
        while (reloadCount_ > 0)
        {
            new_value += HW::TIMER_MAX_VALUE;
            reloadCount_--;
        }
        //HASSERT(new_value > lastTimerValue_);
        new_value -= lastTimerValue_;
        if (!inputData_.full())
        {
            inputData_.back() = overflowed_ ? 3 : new_value;
            overflowed_ = false;
            inputData_.increment_back();
        } else {
            overflowed_ = true;
        }
        lastTimerValue_ = raw_new_value;
        MAP_IntPendSet(HW::OS_INTERRUPT);
    }
}
 
template <class HW>
__attribute__((optimize("-O3"))) void TivaNRZ<HW>::os_interrupt_handler()
{
    if (!inputData_.empty())
    {
        Notifiable *n = readableNotifiable_;
        readableNotifiable_ = nullptr;
        if (n) {
            n->notify_from_isr();
            os_isr_exit_yield_test(true);
        }
    }
}
 
template <class HW>
int TivaNRZ<HW>::ioctl(File *file, unsigned long int key, unsigned long data)
{
    if (IOC_TYPE(key) == CAN_IOC_MAGIC && IOC_SIZE(key) == NOTIFIABLE_TYPE &&
        key == CAN_IOC_READ_ACTIVE)
    {
        Notifiable *n = reinterpret_cast<Notifiable *>(data);
        HASSERT(n);
        // If there is no data for reading, we put the incoming notification
        // into the holder. Otherwise we notify it immediately.
        if (inputData_.empty())
        {
            portENTER_CRITICAL();
            if (inputData_.empty())
            {
                // We are in a critical section now. If we got into this
                // branch, then the buffer was full at the beginning of the
                // critical section. If the hardware interrupt kicks in now,
                // and sets the os_interrupt to pending, the os interrupt will
                // not happen until we leave the critical section, and thus the
                // swap will be in effect by then.
                std::swap(n, readableNotifiable_);
            }
            portEXIT_CRITICAL();
        }
        if (n)
        {
            n->notify();
        }
        return 0;
    }
    errno = EINVAL;
    return -1;
}
 
template<class HW>
ssize_t TivaNRZ<HW>::read(File *file, void *buf, size_t count)
{
    if (count != 4)
    {
        return -EINVAL;
    }
    // We only need this critical section to prevent concurrent threads from
    // reading at the same time.
    portENTER_CRITICAL();
    if (inputData_.empty()) {
        portEXIT_CRITICAL();
        return -EAGAIN;
    }
    uint32_t v = reinterpret_cast<uint32_t>(buf);
    HASSERT((v & 3) == 0); // alignment check.
    uint32_t* pv = static_cast<uint32_t*>(buf);
    *pv = inputData_.front();
    inputData_.increment_front();
    portEXIT_CRITICAL();
    return count;
}