Open Model Railroad Network (OpenMRN)
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TivaGPIOGeneric.hxx
Go to the documentation of this file.
1
36#ifndef _FREERTOS_DRIVERS_TI_TIVAGPIOGENERIC_HXX_
37#define _FREERTOS_DRIVERS_TI_TIVAGPIOGENERIC_HXX_
38
39#include <stdint.h>
40
41#include "driverlib/gpio.h"
42#include "driverlib/pin_map.h"
43#include "driverlib/sysctl.h"
44#include "inc/hw_gpio.h"
45#include "inc/hw_memmap.h"
46#include "inc/hw_types.h"
47
48#include "GPIOGeneric.hxx"
49
53class TivaGpio : public Gpio
54{
55public:
61 TivaGpio(unsigned number, Mode mode, Value safe = CLR);
62
66 {
67 }
68
75 {
76 bool set = (HWREG(base + (GPIO_O_DATA + (bit << 2))) != 0);
77 return invert ? !set : set;
78 }
79
86 {
87 bool clr = (HWREG(base + (GPIO_O_DATA + (bit << 2))) == 0);
88 return invert ? !clr : clr;
89 }
90
95 {
96 HWREG(base + (GPIO_O_DATA + (bit << 2))) = invert ? 0 : 0xFF;
97 }
98
103 {
104 HWREG(base + (GPIO_O_DATA + (bit << 2))) = invert ? 0xFF : 0;
105 }
106
110 void direction(Mode mode) OVERRIDE;
111
115 Mode direction() OVERRIDE;
116
117private:
119 uint32_t base;
120
122};
123
130{
275 PIN_COUNT
277
278#endif /* _FREERTOS_DRIVERS_TI_TIVAGPIOGENERIC_HXX_ */
279
280
TivaGpioMapping
Mapping of Tiva GPIO names found in the literature to generic gpio numbers.
@ PORTK_3
Port K bit 3.
@ PORTE_6
Port E bit 6.
@ PORTA_3
Port A bit 3.
@ PORTL_4
Port L bit 4.
@ PORTJ_5
Port J bit 5.
@ PORTC_1
Port C bit 1.
@ PORTB_5
Port B bit 5.
@ PORTP_7
Port P bit 7.
@ PORTA_1
Port A bit 1.
@ PORTD_1
Port D bit 1.
@ PORTQ_6
Port Q bit 6.
@ PORTN_5
Port N bit 5.
@ PORTP_6
Port P bit 6.
@ PORTA_2
Port A bit 2.
@ PORTD_3
Port D bit 3.
@ PORTH_6
Port H bit 6.
@ PORTL_2
Port L bit 2.
@ PORTQ_7
Port Q bit 7.
@ PORTS_0
Port S bit 0.
@ PORTP_4
Port P bit 4.
@ PORTT_4
Port T bit 4.
@ PORTE_3
Port E bit 3.
@ PORTF_7
Port F bit 7.
@ PORTN_1
Port N bit 1.
@ PORTG_3
Port G bit 3.
@ PORTJ_6
Port J bit 6.
@ PORTA_6
Port A bit 6.
@ PORTG_4
Port G bit 4.
@ PORTM_5
Port M bit 5.
@ PORTS_5
Port S bit 5.
@ PORTQ_3
Port Q bit 3.
@ PORTK_5
Port K bit 5.
@ PORTA_4
Port A bit 4.
@ PORTN_6
Port N bit 6.
@ PORTQ_0
Port Q bit 0.
@ PORTR_4
Port R bit 4.
@ PORTG_6
Port G bit 6.
@ PORTH_4
Port H bit 4.
@ PORTB_4
Port B bit 4.
@ PORTL_0
Port L bit 0.
@ PORTE_2
Port E bit 2.
@ PORTP_3
Port P bit 3.
@ PORTL_1
Port L bit 1.
@ PORTD_4
Port D bit 4.
@ PORTS_4
Port S bit 4.
@ PORTQ_4
Port Q bit 4.
@ PORTF_5
Port F bit 5.
@ PORTB_0
Port B bit 0.
@ PORTK_1
Port K bit 1.
@ PORTS_1
Port S bit 1.
@ PORTA_5
Port A bit 5.
@ PORTM_2
Port M bit 2.
@ PORTG_1
Port G bit 1.
@ PORTH_0
Port H bit 0.
@ PORTQ_1
Port Q bit 1.
@ PORTC_2
Port C bit 2.
@ PORTJ_4
Port J bit 4.
@ PORTH_2
Port H bit 2.
@ PORTB_7
Port B bit 7.
@ PORTA_0
Port A bit 0.
@ PORTB_3
Port B bit 3.
@ PORTR_2
Port R bit 2.
@ PORTF_4
Port F bit 4.
@ PORTK_4
Port K bit 4.
@ PORTH_3
Port H bit 3.
@ PORTB_6
Port B bit 6.
@ PORTB_2
Port B bit 2.
@ PORTH_7
Port H bit 7.
@ PORTR_1
Port R bit 1.
@ PORTL_6
Port L bit 6.
@ PORTN_3
Port N bit 3.
@ PORTC_6
Port C bit 6.
@ PORTM_6
Port M bit 6.
@ PORTD_6
Port D bit 6.
@ PORTT_5
Port T bit 5.
@ PORTP_2
Port P bit 2.
@ PORTP_0
Port P bit 0.
@ PORTG_0
Port G bit 0.
@ PORTN_2
Port N bit 2.
@ PORTN_7
Port N bit 7.
@ PORTE_1
Port E bit 1.
@ PORTM_4
Port M bit 4.
@ PORTE_5
Port E bit 5.
@ PORTS_2
Port S bit 2.
@ PORTT_2
Port T bit 2.
@ PORTL_5
Port L bit 5.
@ PORTM_0
Port M bit 0.
@ PORTM_3
Port M bit 3.
@ PORTP_5
Port P bit 5.
@ PORTT_6
Port T bit 6.
@ PORTR_3
Port R bit 3.
@ PORTN_0
Port N bit 0.
@ PORTL_7
Port L bit 7.
@ PORTD_5
Port D bit 5.
@ PORTH_1
Port H bit 1.
@ PORTT_3
Port T bit 3.
@ PORTT_0
Port T bit 0.
@ PORTD_2
Port D bit 2.
@ PORTJ_3
Port J bit 3.
@ PORTG_5
Port G bit 5.
@ PORTF_6
Port F bit 6.
@ PORTN_4
Port N bit 4.
@ PORTL_3
Port L bit 3.
@ PORTE_7
Port E bit 7.
@ PORTG_2
Port G bit 2.
@ PORTK_0
Port K bit 0.
@ PORTD_0
Port D bit 0.
@ PORTR_5
Port R bit 5.
@ PORTE_0
Port E bit 0.
@ PORTQ_2
Port Q bit 2.
@ PORTJ_1
Port J bit 1.
@ PORTR_7
Port R bit 7.
@ PORTJ_7
Port J bit 7.
@ PORTS_6
Port S bit 6.
@ PORTQ_5
Port Q bit 5.
@ PORTT_1
Port T bit 1.
@ PORTA_7
Port A bit 7.
@ PORTF_2
Port F bit 2.
@ PORTH_5
Port H bit 5.
@ PORTK_6
Port K bit 6.
@ PORTG_7
Port G bit 7.
@ PORTC_3
Port C bit 3.
@ PORTS_3
Port S bit 3.
@ PORTF_0
Port F bit 0.
@ PORTB_1
Port B bit 1.
@ PORTT_7
Port T bit 7.
@ PORTC_5
Port C bit 5.
@ PORTJ_0
Port J bit 0.
@ PORTR_0
Port R bit 0.
@ PORTR_6
Port R bit 6.
@ PORTJ_2
Port J bit 2.
@ PORTE_4
Port E bit 4.
@ PORTK_7
Port K bit 7.
@ PORTD_7
Port D bit 7.
@ PORTS_7
Port S bit 7.
@ PORTK_2
Port K bit 2.
@ PORTM_7
Port M bit 7.
@ PORTC_0
Port C bit 0.
@ PORTC_7
Port C bit 7.
@ PORTM_1
Port M bit 1.
@ PORTF_1
Port F bit 1.
@ PORTC_4
Port C bit 4.
@ PORTF_3
Port F bit 3.
@ PIN_COUNT
Total number of GPIO pins.
@ PORTP_1
Port P bit 1.
OS-independent abstraction for GPIO.
Definition Gpio.hxx:43
Value
Defines the options for GPIO level.
Definition Gpio.hxx:62
Generic GPIO class implementation.
Definition TivaGPIO.hxx:73
constexpr TivaGpio()
This constructor is constexpr which ensures that the object can be initialized in the data section.
Definition TivaGPIO.hxx:77
~TivaGpio()
Destructor.
bool is_clr() OVERRIDE
Test the GPIO pin to see if it is clear.
bool is_set() OVERRIDE
Test the GPIO pin to see if it is set.
void clr() const OVERRIDE
Clears the GPIO output pin to low.
Definition TivaGPIO.hxx:91
uint32_t base
BASE address of the GPIO.
void clr() OVERRIDE
Clear the GPIO to a '0'.
void set() OVERRIDE
Set the GPIO to a '1'.
Direction direction() const OVERRIDE
Gets the GPIO direction.
Definition TivaGPIO.hxx:113
void set() const OVERRIDE
Sets the GPIO output pin to high.
Definition TivaGPIO.hxx:86
#define OVERRIDE
Function attribute for virtual functions declaring that this funciton is overriding a funciton that s...
Definition macros.h:180
#define DISALLOW_COPY_AND_ASSIGN(TypeName)
Removes default copy-constructor and assignment added by C++.
Definition macros.h:171