47 :
Gpio(number, mode, safe)
53 HASSERT((mode & (PULL_UP | PULL_DOWN)) == (PULL_UP | PULL_DOWN));
56 bit = 0x01 << (number % 8);
61 MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA);
62 base = GPIO_PORTA_BASE;
66 MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOB);
67 base = GPIO_PORTB_BASE;
71 MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOC);
72 base = GPIO_PORTC_BASE;
76 MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOD);
77 base = GPIO_PORTD_BASE;
81 MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOE);
82 base = GPIO_PORTE_BASE;
86 MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOF);
87 base = GPIO_PORTF_BASE;
91 MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOG);
92 base = GPIO_PORTG_BASE;
96 MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOH);
97 base = GPIO_PORTH_BASE;
101 MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOJ);
102 base = GPIO_PORTJ_BASE;
106 MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOK);
107 base = GPIO_PORTK_BASE;
111 MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOL);
112 base = GPIO_PORTL_BASE;
116 MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOM);
117 base = GPIO_PORTM_BASE;
121 MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPION);
122 base = GPIO_PORTN_BASE;
126 MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOP);
127 base = GPIO_PORTP_BASE;
131 MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOQ);
132 base = GPIO_PORTQ_BASE;
136 MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOR);
137 base = GPIO_PORTR_BASE;
141 MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOS);
142 base = GPIO_PORTS_BASE;
146 MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOT);
147 base = GPIO_PORTT_BASE;
153 MAP_GPIOPinTypeGPIOOutput(
base, bit);
154 MAP_GPIOPinWrite(
base, bit, (safeValue ^ invert) ? bit : 0);
158 MAP_GPIOPinTypeGPIOInput(
base, bit);
162 uint32_t strength = mode & LED ? GPIO_STRENGTH_8MA : GPIO_STRENGTH_2MA;
166 type = GPIO_PIN_TYPE_STD_WPU;
168 else if (mode & PULL_DOWN)
170 type = GPIO_PIN_TYPE_STD_WPD;
174 type = GPIO_PIN_TYPE_STD;
176 MAP_GPIOPadConfigSet(
base, bit, strength, type);