Esp32Gpio.hxx

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#ifndef _DRIVERS_ESP32GPIO_HXX_
#define _DRIVERS_ESP32GPIO_HXX_
 
#include "freertos_drivers/common/GpioWrapper.hxx"
#include "freertos_drivers/esp32/Esp32AdcOneShot.hxx"
#include "os/Gpio.hxx"
#include "utils/logging.h"
#include "utils/macros.h"
 
#include <driver/gpio.h>
#include <esp_rom_gpio.h>
 
#include <soc/gpio_struct.h>
 
#if defined(CONFIG_IDF_TARGET_ESP32C3)
#define IS_GPIO_OUTPUT(pin) (GPIO_IS_VALID_OUTPUT_GPIO(pin) &&                 \
                             GPIO.enable.data & BIT(pin & 25))
#else // NOT ESP32-C3
#define IS_GPIO_OUTPUT(pin) (GPIO_IS_VALID_OUTPUT_GPIO(pin) &&                 \
                             (pin < 32) ? GPIO.enable & BIT(pin & 31) :        \
                                          GPIO.enable1.data & BIT(pin & 31))
#endif // CONFIG_IDF_TARGET_ESP32C3
 
template <class Defs, bool SAFE_VALUE, bool INVERT> struct GpioOutputPin;
template <class Defs, bool PUEN, bool PDEN> struct GpioInputPin;
 
template <gpio_num_t PIN_NUM, bool INVERTED = false>
class Esp32Gpio : public Gpio
{
public:
#if CONFIG_IDF_TARGET_ESP32S3
    static_assert(PIN_NUM >= 0 && PIN_NUM <= 48, "Valid pin range is 0..48.");
    static_assert(!(PIN_NUM >= 22 && PIN_NUM <= 25)
                , "Pin does not exist");
    static_assert(!(PIN_NUM >= 26 && PIN_NUM <= 32)
                , "Pin is reserved for flash usage.");
#if defined(CONFIG_SPIRAM_MODE_OCT) || defined(CONFIG_ESPTOOLPY_OCT_FLASH)
    static_assert(!(PIN_NUM >= 33 && PIN_NUM <= 37),
                  "Pin is not available when Octal SPI mode is enabled.");
#endif // ESP32S3 with Octal SPI
#elif CONFIG_IDF_TARGET_ESP32S2
    static_assert(PIN_NUM >= 0 && PIN_NUM <= 46, "Valid pin range is 0..46.");
    static_assert(!(PIN_NUM >= 22 && PIN_NUM <= 25)
                , "Pin does not exist");
    static_assert(!(PIN_NUM >= 26 && PIN_NUM <= 32)
                , "Pin is reserved for flash usage.");
#elif CONFIG_IDF_TARGET_ESP32C3
    static_assert(PIN_NUM >= 0 && PIN_NUM <= 21, "Valid pin range is 0..21.");
    // these pins are connected to the embedded flash and are not exposed on
    // the DevKitM-1 board.
    static_assert(!(PIN_NUM >= 11 && PIN_NUM <= 17)
                , "Pin is reserved for flash usage.");
#else // ESP32
    static_assert(PIN_NUM >= 0 && PIN_NUM <= 39, "Valid pin range is 0..39.");
    static_assert(PIN_NUM != 24, "Pin does not exist");
    static_assert(!(PIN_NUM >= 28 && PIN_NUM <= 31), "Pin does not exist");
    // Most commercially available boards include a capacitor on these two
    // pins, however, there is no available define that can be used to allow
    // usage of these when building for a custom PCB using the bare QFN chip.
    // static_assert(PIN_NUM != 37, "Pin is connected to GPIO 36 via capacitor.");
    // static_assert(PIN_NUM != 38, "Pin is connected to GPIO 39 via capacitor.");
#if defined(ESP32_PICO)
    static_assert(!(PIN_NUM >= 6 && PIN_NUM <= 8)
                , "Pin is reserved for flash usage.");
    static_assert(PIN_NUM != 11 && PIN_NUM != 16 && PIN_NUM != 17
                , "Pin is reserved for flash usage.");
#else
    static_assert(!(PIN_NUM >= 6 && PIN_NUM <= 11)
                , "Pin is reserved for flash usage.");
#if defined(BOARD_HAS_PSRAM) || defined(CONFIG_SPIRAM_SUPPORT)
    static_assert(PIN_NUM != 16 && PIN_NUM != 17
                , "Pin is reserved for PSRAM usage.");
#endif // BOARD_HAS_PSRAM
#endif // ESP32_PICO
#endif // CONFIG_IDF_TARGET_ESP32S2 / CONFIG_IDF_TARGET_ESP32S3
 
    void write(Value new_state) const override
    {
        if (INVERTED)
        {
            LOG(VERBOSE, "Esp32Gpio(%d) write %s", PIN_NUM,
                new_state == Value::SET ? "CLR" : "SET");
            ESP_ERROR_CHECK(gpio_set_level(PIN_NUM, new_state == Value::CLR));
        }
        else
        {
            LOG(VERBOSE, "Esp32Gpio(%d) write %s", PIN_NUM,
                new_state == Value::SET ? "SET" : "CLR");
            ESP_ERROR_CHECK(gpio_set_level(PIN_NUM, new_state));
        }
    }
 
    Value read() const override
    {
        return (Value)gpio_get_level(PIN_NUM);
    }
 
    void set() const override
    {
        write(Value::SET);
    }
 
    void clr() const override
    {
        write(Value::CLR);
    }
 
    void set_direction(Direction dir) const override
    {
        if (dir == Direction::DOUTPUT)
        {
            HASSERT(GPIO_IS_VALID_OUTPUT_GPIO(PIN_NUM));
            // using GPIO_MODE_INPUT_OUTPUT instead of GPIO_MODE_OUTPUT so that
            // we can read the IO state
            ESP_ERROR_CHECK(
                gpio_set_direction(PIN_NUM, GPIO_MODE_INPUT_OUTPUT));
            LOG(VERBOSE, "Esp32Gpio(%d) configured as OUTPUT", PIN_NUM);
        }
        else
        {
            ESP_ERROR_CHECK(gpio_set_direction(PIN_NUM, GPIO_MODE_INPUT));
            LOG(VERBOSE, "Esp32Gpio(%d) configured as INPUT", PIN_NUM);
        }
    }
 
    Direction direction() const override
    {
        if (IS_GPIO_OUTPUT(PIN_NUM))
        {
            return Direction::DOUTPUT;
        }
        return Direction::DINPUT;
    }
private:
    template <class Defs, bool SAFE_VALUE, bool INVERT> friend struct GpioOutputPin;
    template <class Defs, bool PUEN, bool PDEN> friend struct GpioInputPin;
    static const Esp32Gpio instance_;
};
 
template <gpio_num_t PIN_NUM, bool INVERTED>
const Esp32Gpio<PIN_NUM, INVERTED> Esp32Gpio<PIN_NUM, INVERTED>::instance_;
 
template <class Defs, bool SAFE_VALUE, bool INVERT = false>
struct GpioOutputPin : public Defs
{
public:
    using Defs::PIN_NUM;
// compile time sanity check that the selected pin is valid for output.
#if CONFIG_IDF_TARGET_ESP32S2
    static_assert(PIN_NUM != 46, "Pin 46 can not be used for output.");
#elif CONFIG_IDF_TARGET_ESP32
    static_assert(PIN_NUM < 34, "Pins 34 and above can not be used as output.");
#endif // CONFIG_IDF_TARGET_ESP32S2 / CONFIG_IDF_TARGET_ESP32S3
 
    static void hw_init()
    {
        LOG(VERBOSE,
            "[Esp32Gpio] Configuring output pin %d, default value: %d",
            PIN_NUM, SAFE_VALUE);
        esp_rom_gpio_pad_select_gpio(PIN_NUM);
        gpio_config_t cfg;
        memset(&cfg, 0, sizeof(gpio_config_t));
        cfg.pin_bit_mask = BIT64(PIN_NUM);
        // using GPIO_MODE_INPUT_OUTPUT instead of GPIO_MODE_OUTPUT so that
        // we can read the IO state
        cfg.mode = GPIO_MODE_INPUT_OUTPUT;
        ESP_ERROR_CHECK(gpio_config(&cfg));
        ESP_ERROR_CHECK(gpio_set_level(PIN_NUM, SAFE_VALUE));
    }
 
    static void hw_set_to_safe()
    {
        ESP_ERROR_CHECK(gpio_set_level(PIN_NUM, SAFE_VALUE));
    }
 
    static void toggle()
    {
        instance()->write(!instance()->read());
    }
 
    static void set(bool value)
    {
        instance()->write(value);
    }
 
    static constexpr const Gpio *instance()
    {
        return &Esp32Gpio<PIN_NUM, INVERT>::instance_;
    }
};
 
template <class Defs>
struct GpioOutputSafeLow : public GpioOutputPin<Defs, false>
{
};
 
template <class Defs>
struct GpioOutputSafeLowInvert : public GpioOutputPin<Defs, false, true>
{
};
 
template <class Defs>
struct GpioOutputSafeHigh : public GpioOutputPin<Defs, true>
{
};
 
template <class Defs>
struct GpioOutputSafeHighInvert : public GpioOutputPin<Defs, true, true>
{
};
 
template <class Defs, bool PUEN, bool PDEN> struct GpioInputPin : public Defs
{
public:
    using Defs::PIN_NUM;
#if CONFIG_IDF_TARGET_ESP32S2
    // GPIO 45 and 46 typically have pull-down resistors.
    static_assert(!PUEN || (PUEN && (PIN_NUM != 45 && PIN_NUM != 46)),
                  "GPIO 45 and 46 typically have built-in pull-down "
                  "resistors, enabling pull-up is not possible.");
    // GPIO 0 typically has a pull-up resistor
    static_assert(!PDEN || (PDEN && PIN_NUM != 0),
                  "GPIO 0 typically has a built-in pull-up resistors, "
                  "enabling pull-down is not possible.");
#elif CONFIG_IDF_TARGET_ESP32S3
    // GPIO 0 typically has a pull-up resistor
    static_assert(!PDEN || (PDEN && PIN_NUM != 0),
                  "GPIO 0 typically has a built-in pull-up resistors, "
                  "enabling pull-down is not possible.");
#elif CONFIG_IDF_TARGET_ESP32C3
    // GPIO 9 typically has a pull-up resistor
    static_assert(!PDEN || (PDEN && PIN_NUM != 9),
                  "GPIO 9 typically has a built-in pull-up resistors, "
                  "enabling pull-down is not possible.");
#else // ESP32
    // GPIO 2, 4 and 12 typically have pull-down resistors.
    static_assert(!PUEN ||
                  (PUEN && (PIN_NUM != 2 && PIN_NUM != 4 && PIN_NUM != 12)),
                  "GPIO 2, 4, 12 typically have built-in pull-down resistors, "
                  "enabling pull-up is not possible.");
    // GPIO 0, 5 and 15 typically have pull-up resistors.
    static_assert(!PDEN ||
                  (PDEN && (PIN_NUM != 0 && PIN_NUM != 5 && PIN_NUM == 15)),
                  "GPIO 0, 5, 15 typically have built-in pull-up resistors, "
                  "enabling pull-down is not possible.");
#endif // CONFIG_IDF_TARGET_ESP32S2
    static void hw_init()
    {
        LOG(VERBOSE, "[Esp32Gpio] Configuring input pin %d, PUEN: %d, PDEN: %d",
            PIN_NUM, PUEN, PDEN);
        esp_rom_gpio_pad_select_gpio(PIN_NUM);
        gpio_config_t cfg;
        memset(&cfg, 0, sizeof(gpio_config_t));
        cfg.pin_bit_mask = BIT64(PIN_NUM);
        // using GPIO_MODE_INPUT_OUTPUT instead of GPIO_MODE_OUTPUT so that
        // we can read the IO state
        cfg.mode = GPIO_MODE_INPUT;
        if (PUEN)
        {
            cfg.pull_up_en = GPIO_PULLUP_ENABLE;
        }
        if (PDEN)
        {
            cfg.pull_down_en = GPIO_PULLDOWN_ENABLE;
        }
        ESP_ERROR_CHECK(gpio_config(&cfg));
    }
    static void hw_set_to_safe()
    {
        hw_init();
    }
 
    static bool get()
    {
        return instance()->read();
    }
 
    static constexpr const Gpio *instance()
    {
        return &Esp32Gpio<PIN_NUM>::instance_;
    }
};
 
template <class Defs> struct GpioInputNP : public GpioInputPin<Defs, false, false>
{
};
 
template <class Defs> struct GpioInputPU : public GpioInputPin<Defs, true, false>
{
};
 
template <class Defs> struct GpioInputPD : public GpioInputPin<Defs, false, true>
{
};
 
template <class Defs> struct GpioInputPUPD : public GpioInputPin<Defs, true, true>
{
};
 
#define GPIO_PIN(NAME, BaseClass, NUM)                                         \
    struct NAME##Defs                                                          \
    {                                                                          \
        static const gpio_num_t PIN_NUM = (gpio_num_t)NUM;                     \
                                                                               \
    public:                                                                    \
        static gpio_num_t pin()                                                \
        {                                                                      \
            return PIN_NUM;                                                    \
        }                                                                      \
    };                                                                         \
    typedef BaseClass<NAME##Defs> NAME##_Pin
 
#endif // _DRIVERS_ESP32GPIO_HXX_