Open Model Railroad Network (OpenMRN)
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builtins.h
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#ifndef _FREERTOS_DRIVERS_PIC32MX_BUILTINS_H_
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#define _FREERTOS_DRIVERS_PIC32MX_BUILTINS_H_
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#define __builtin_mfc0(reg, sel) \
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__extension__ ({ \
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register unsigned long __r; \
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__asm__ __volatile__ ("mfc0 %0,$%1,%2" \
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: "=d" (__r) \
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: "JK" (reg), "JK" (sel)); \
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__r; \
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})
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#define __builtin_mtc0(reg, sel, val) \
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do { \
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__asm__ __volatile__ ("%(mtc0 %z0,$%1,%2; ehb%)" \
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: \
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: "dJ" ((_reg_t)(val)), "JK" (reg), "JK" (sel) \
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: "memory"); \
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} while (0)
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/* exchange (swap) VAL and CP0 register REG,SEL */
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#define __builtin_mxc0(reg, sel, val) \
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__extension__ ({ \
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register _reg_t __o; \
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__o = _mfc0 (reg, sel); \
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_mtc0 (reg, sel, val); \
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__o; \
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})
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/* bit clear non-zero bits from CLR in CP0 register REG,SEL */
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#define __builtin_bcc0(reg, sel, clr) \
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__extension__ ({ \
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register _reg_t __o; \
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__o = _mfc0 (reg, sel); \
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_mtc0 (reg, sel, __o & ~(clr)); \
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__o; \
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})
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/* bit set non-zero bits from SET in CP0 register REG,SEL */
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#define __builtin_bsc0(reg, sel, set) \
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__extension__ ({ \
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register _reg_t __o; \
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__o = _mfc0 (reg, sel); \
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_mtc0 (reg, sel, __o | (set)); \
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__o; \
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})
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/* bit clear non-zero bits from CLR and set non-zero bits from SET in REG,SEL */
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#define __builtin_bcsc0(reg, sel, clr, set) \
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__extension__ ({ \
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register _reg_t __o; \
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__o = _mfc0 (reg, sel); \
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_mtc0 (reg, sel, (__o & ~(clr)) | (set)); \
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__o; \
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})
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#endif
// _FREERTOS_DRIVERS_PIC32MX_BUILTINS_H_
src
freertos_drivers
pic32mx
builtins.h
Generated on Sun Feb 2 2025 21:18:13 for Open Model Railroad Network (OpenMRN) by
1.9.8