Open Model Railroad Network (OpenMRN)
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builtins.h
1#ifndef _FREERTOS_DRIVERS_PIC32MX_BUILTINS_H_
2#define _FREERTOS_DRIVERS_PIC32MX_BUILTINS_H_
3
4
5#define __builtin_mfc0(reg, sel) \
6__extension__ ({ \
7 register unsigned long __r; \
8 __asm__ __volatile__ ("mfc0 %0,$%1,%2" \
9 : "=d" (__r) \
10 : "JK" (reg), "JK" (sel)); \
11 __r; \
12})
13
14#define __builtin_mtc0(reg, sel, val) \
15do { \
16 __asm__ __volatile__ ("%(mtc0 %z0,$%1,%2; ehb%)" \
17 : \
18 : "dJ" ((_reg_t)(val)), "JK" (reg), "JK" (sel) \
19 : "memory"); \
20} while (0)
21
22/* exchange (swap) VAL and CP0 register REG,SEL */
23#define __builtin_mxc0(reg, sel, val) \
24__extension__ ({ \
25 register _reg_t __o; \
26 __o = _mfc0 (reg, sel); \
27 _mtc0 (reg, sel, val); \
28 __o; \
29})
30
31/* bit clear non-zero bits from CLR in CP0 register REG,SEL */
32#define __builtin_bcc0(reg, sel, clr) \
33__extension__ ({ \
34 register _reg_t __o; \
35 __o = _mfc0 (reg, sel); \
36 _mtc0 (reg, sel, __o & ~(clr)); \
37 __o; \
38})
39
40/* bit set non-zero bits from SET in CP0 register REG,SEL */
41#define __builtin_bsc0(reg, sel, set) \
42__extension__ ({ \
43 register _reg_t __o; \
44 __o = _mfc0 (reg, sel); \
45 _mtc0 (reg, sel, __o | (set)); \
46 __o; \
47})
48
49/* bit clear non-zero bits from CLR and set non-zero bits from SET in REG,SEL */
50#define __builtin_bcsc0(reg, sel, clr, set) \
51__extension__ ({ \
52 register _reg_t __o; \
53 __o = _mfc0 (reg, sel); \
54 _mtc0 (reg, sel, (__o & ~(clr)) | (set)); \
55 __o; \
56})
57
58#endif // _FREERTOS_DRIVERS_PIC32MX_BUILTINS_H_