Open Model Railroad Network (OpenMRN)
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Esp32SocInfo.cxx
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1
36#if defined(ESP_PLATFORM)
37
38#include "freertos_drivers/esp32/Esp32SocInfo.hxx"
39#include "utils/logging.h"
40
41#include <esp_ota_ops.h>
42#include <esp_chip_info.h>
43
44namespace openmrn_arduino
45{
46
47#if defined(CONFIG_IDF_TARGET_ESP32)
49static constexpr const char * const RESET_REASONS[] =
50{
51 "unknown", // NO_MEAN 0
52 "power on reset", // POWERON_RESET 1
53 "unknown", // no key 2
54 "software reset", // SW_RESET 3
55 "watchdog reset (legacy)", // OWDT_RESET 4
56 "deep sleep reset", // DEEPSLEEP_RESET 5
57 "reset (SLC)", // SDIO_RESET 6
58 "watchdog reset (group0)", // TG0WDT_SYS_RESET 7
59 "watchdog reset (group1)", // TG1WDT_SYS_RESET 8
60 "RTC system reset", // RTCWDT_SYS_RESET 9
61 "Intrusion test reset", // INTRUSION_RESET 10
62 "WDT Timer group reset", // TGWDT_CPU_RESET 11
63 "software reset (CPU)", // SW_CPU_RESET 12
64 "RTC WDT reset", // RTCWDT_CPU_RESET 13
65 "software reset (CPU)", // EXT_CPU_RESET 14
66 "Brownout reset", // RTCWDT_BROWN_OUT_RESET 15
67 "RTC Reset (Normal)", // RTCWDT_RTC_RESET 16
68};
69#elif defined(CONFIG_IDF_TARGET_ESP32S2)
71static constexpr const char * const RESET_REASONS[] =
72{
73 "unknown", // NO_MEAN 0
74 "power on reset", // POWERON_RESET 1
75 "unknown", // no key 2
76 "software reset", // SW_RESET 3
77 "unknown", // no key 4
78 "deep sleep reset", // DEEPSLEEP_RESET 5
79 "unknown", // no key 6
80 "watchdog reset (group0)", // TG0WDT_SYS_RESET 7
81 "watchdog reset (group1)", // TG1WDT_SYS_RESET 8
82 "RTC system reset", // RTCWDT_SYS_RESET 9
83 "Intrusion test reset", // INTRUSION_RESET 10
84 "WDT Timer group0 reset", // TG0WDT_CPU_RESET 11
85 "software reset (CPU)", // RTC_SW_CPU_RESET 12
86 "RTC WDT reset", // RTCWDT_CPU_RESET 13
87 "unknown", // no key 14
88 "Brownout reset", // RTCWDT_BROWN_OUT_RESET 15
89 "RTC Reset (Normal)", // RTCWDT_RTC_RESET 16
90 "WDT Timer group1 reset", // TG1WDT_CPU_RESET 17
91 "WDT Reset", // SUPER_WDT_RESET 18
92 "RTC Reset (Glitch)", // GLITCH_RTC_RESET 19
93};
94#elif defined(CONFIG_IDF_TARGET_ESP32C3)
96static constexpr const char * const RESET_REASONS[] =
97{
98 "unknown", // NO_MEAN 0
99 "power on reset", // POWERON_RESET 1
100 "unknown", // no key 2
101 "software reset", // SW_RESET 3
102 "unknown", // no key 4
103 "deep sleep reset", // DEEPSLEEP_RESET 5
104 "unknown", // no key 6
105 "watchdog reset (group0)", // TG0WDT_SYS_RESET 7
106 "watchdog reset (group1)", // TG1WDT_SYS_RESET 8
107 "RTC system reset", // RTCWDT_SYS_RESET 9
108 "Intrusion test reset", // INTRUSION_RESET 10
109 "WDT Timer group0 reset", // TG0WDT_CPU_RESET 11
110 "software reset (CPU)", // RTC_SW_CPU_RESET 12
111 "RTC WDT reset", // RTCWDT_CPU_RESET 13
112 "unknown", // no key 14
113 "Brownout reset", // RTCWDT_BROWN_OUT_RESET 15
114 "RTC Reset (Normal)", // RTCWDT_RTC_RESET 16
115 "WDT Timer group1 reset", // TG1WDT_CPU_RESET 17
116 "WDT Reset", // SUPER_WDT_RESET 18
117 "RTC Reset (Glitch)", // GLITCH_RTC_RESET 19
118 "eFuse Reset", // EFUSE_RESET 20
119 "USB UART Reset", // USB_UART_CHIP_RESET 21
120 "USB JTAG Reset", // USB_JTAG_CHIP_RESET 22
121 "Power Glitch Reset", // POWER_GLITCH_RESET 23
122};
123#elif defined(CONFIG_IDF_TARGET_ESP32S3)
125static constexpr const char * const RESET_REASONS[] =
126{
127 "unknown", // NO_MEAN 0
128 "power on reset", // POWERON_RESET 1
129 "unknown", // no key 2
130 "software reset", // RTC_SW_SYS_RESET 3
131 "unknown", // no key 4
132 "deep sleep reset", // DEEPSLEEP_RESET 5
133 "unknown", // no key 6
134 "watchdog reset (group0)", // TG0WDT_SYS_RESET 7
135 "watchdog reset (group1)", // TG1WDT_SYS_RESET 8
136 "RTC system reset", // RTCWDT_SYS_RESET 9
137 "Intrusion test reset", // INTRUSION_RESET 10
138 "WDT Timer group0 reset", // TG0WDT_CPU_RESET 11
139 "software reset (CPU)", // RTC_SW_CPU_RESET 12
140 "RTC WDT reset", // RTCWDT_CPU_RESET 13
141 "unknown", // no key 14
142 "Brownout reset", // RTCWDT_BROWN_OUT_RESET 15
143 "RTC Reset (Normal)", // RTCWDT_RTC_RESET 16
144 "WDT Timer group1 reset", // TG1WDT_CPU_RESET 17
145 "WDT Reset", // SUPER_WDT_RESET 18
146 "RTC Reset (Glitch)", // GLITCH_RTC_RESET 19
147 "eFuse Reset", // EFUSE_RESET 20
148 "USB UART Reset", // USB_UART_CHIP_RESET 21
149 "USB JTAG Reset", // USB_JTAG_CHIP_RESET 22
150 "Power Glitch Reset", // POWER_GLITCH_RESET 23
151};
152#elif defined(CONFIG_IDF_TARGET_ESP32H2)
154static constexpr const char * const RESET_REASONS[] =
155{
156 "unknown", // NO_MEAN 0
157 "power on reset", // POWERON_RESET 1
158 "unknown", // no key 2
159 "software reset", // SW_RESET 3
160 "unknown", // no key 4
161 "deep sleep reset", // DEEPSLEEP_RESET 5
162 "reset (SLC)", // SDIO_RESET 6
163 "watchdog reset (group0)", // TG0WDT_SYS_RESET 7
164 "watchdog reset (group1)", // TG1WDT_SYS_RESET 8
165 "RTC system reset", // RTCWDT_SYS_RESET 9
166 "Intrusion test reset", // INTRUSION_RESET 10
167 "WDT Timer group0 reset", // TG0WDT_CPU_RESET 11
168 "software reset (CPU)", // RTC_SW_CPU_RESET 12
169 "RTC WDT reset", // RTCWDT_CPU_RESET 13
170 "unknown", // no key 14
171 "Brownout reset", // RTCWDT_BROWN_OUT_RESET 15
172 "RTC Reset (Normal)", // RTCWDT_RTC_RESET 16
173 "WDT Timer group1 reset", // TG1WDT_CPU_RESET 17
174 "WDT Reset", // SUPER_WDT_RESET 18
175 "RTC Reset (Glitch)", // GLITCH_RTC_RESET 19
176 "eFuse Reset", // EFUSE_RESET 20
177 "USB UART Reset", // USB_UART_CHIP_RESET 21
178 "USB JTAG Reset", // USB_JTAG_CHIP_RESET 22
179 "Power Glitch Reset", // POWER_GLITCH_RESET 23
180 "JTAG Reset", // JTAG_RESET 24
181};
182#elif defined(CONFIG_IDF_TARGET_ESP32C2)
184static constexpr const char * const RESET_REASONS[] =
185{
186 "unknown", // NO_MEAN 0x00
187 "power on reset", // POWERON_RESET 0x01
188 "unknown", // no key 0x02
189 "software reset", // SW_RESET 0x03
190 "unknown", // no key 0x04
191 "deep sleep reset", // DEEPSLEEP_RESET 0x05
192 "unknown", // no key 0x06
193 "MWDT (digital) reset", // MWDT0 0x07
194 "unknown", // no key 0x08
195 "RTC WDT reset", // RTC_WDT 0x09
196 "unknown", // no key 0x0A
197 "MWDT reset (CPU)", // MWDT0 0x0B
198 "software reset (CPU)", // SW_CPU_RESET 0x0C
199 "RTC WDT reset (CPU)", // RTC_WDT 0x0D
200 "unknown", // no key 0x0E
201 "Brownout reset", // RTCWDT_BROWN_OUT_RESET 0x0F
202 "RTC Reset (Normal)", // RTCWDT_RTC_RESET 0x10
203 "unknown", // no key 0x11
204 "WDT Super reset", // SUPER_WDT 0x12
205 "unknown", // no key 0x13
206 "eFuse CRC error", // EFUSE_CRC_ERROR 0x14
207 "unknown", // no key 0x15
208 "unknown", // no key 0x16
209 "unknown", // no key 0x17
210 "JTAG Reset" // JTAG_RESET 0x18
211};
212#endif // IDF Target
213
215static constexpr const char * const CHIP_NAMES[] =
216{
217 // Note: this must be kept in sync with esp_chip_model_t.
218 "Unknown", // 0 Unknown (placeholder)
219 "ESP32", // 1 CHIP_ESP32
220 "ESP32-S2", // 2 CHIP_ESP32S2
221 "Unknown", // 3 Unknown (placeholder)
222 "Unknown", // 4 Unknown (placeholder)
223 "ESP32-C3", // 5 CHIP_ESP32C3
224 "ESP32-H2", // 6 CHIP_ESP32H2
225 "Unknown", // 7 Unknown (placeholder)
226 "Unknown", // 8 Unknown (placeholder)
227 "ESP32-S3", // 9 CHIP_ESP32S3
228 "Unknown", // 10 Unknown (placeholder)
229 "Unknown", // 11 Unknown (placeholder)
230 "ESP32-C2", // 12 CHIP_ESP32C2
231};
232
233uint8_t Esp32SocInfo::print_soc_info()
234{
235 // capture the reason for the CPU reset. For dual core SoCs this will
236 // only check the PRO CPU and not the APP CPU since they will usually
237 // restart one after the other.
238 uint8_t reset_reason = rtc_get_reset_reason(PRO_CPU_NUM);
239 uint8_t orig_reset_reason = reset_reason;
240 // Ensure the reset reason is within bounds.
241 if (reset_reason >= ARRAYSIZE(RESET_REASONS))
242 {
243 reset_reason = 0;
244 }
245 esp_chip_info_t chip_info;
246 esp_chip_info(&chip_info);
247 size_t chip_model = chip_info.model;
248 // Ensure chip model is within bounds.
249 if (chip_model >= ARRAYSIZE(CHIP_NAMES))
250 {
251 chip_model = 0;
252 }
253
254 LOG(INFO, "[SoC] reset reason:%d - %s", reset_reason,
255 RESET_REASONS[reset_reason]);
256 LOG(INFO,
257 "[SoC] model:%s,rev:%d,cores:%d,flash:%s,WiFi:%s,BLE:%s,BT:%s",
258 CHIP_NAMES[chip_model], chip_info.revision,
259 chip_info.cores,
260 chip_info.features & CHIP_FEATURE_EMB_FLASH ? "Yes" : "No",
261 chip_info.features & CHIP_FEATURE_WIFI_BGN ? "Yes" : "No",
262 chip_info.features & CHIP_FEATURE_BLE ? "Yes" : "No",
263 chip_info.features & CHIP_FEATURE_BT ? "Yes" : "No");
264
265 LOG(INFO, "[SoC] Heap: %.2fkB / %.2fkB",
266 heap_caps_get_free_size(MALLOC_CAP_INTERNAL) / 1024.0f,
267 heap_caps_get_total_size(MALLOC_CAP_INTERNAL) / 1024.0f);
268#if CONFIG_SPIRAM_SUPPORT || BOARD_HAS_PSRAM || CONFIG_SPIRAM
269 LOG(INFO, "[SoC] PSRAM: %.2fkB / %.2fkB",
270 heap_caps_get_free_size(MALLOC_CAP_SPIRAM) / 1024.0f,
271 heap_caps_get_total_size(MALLOC_CAP_SPIRAM) / 1024.0f);
272#endif // CONFIG_SPIRAM_SUPPORT || BOARD_HAS_PSRAM || CONFIG_SPIRAM
273
274 LOG(INFO, "[SoC] App running from partition: %s",
275 esp_ota_get_running_partition()->label);
276 if (reset_reason != orig_reset_reason)
277 {
278 LOG(WARNING, "Reset reason mismatch: %d vs %d", reset_reason,
279 orig_reset_reason);
280 }
281 return reset_reason;
282}
283
284} // namespace openmrn_arduino
285
286#endif // ESP_PLATFORM
LOG
#define LOG(level, message...)
Conditionally write a message to the logging output.
Definition logging.h:99
WARNING
static const int WARNING
Loglevel that is always printed, reporting a warning or a retryable error.
Definition logging.h:55
INFO
static const int INFO
Loglevel that is printed by default, reporting some status information.
Definition logging.h:57
ARRAYSIZE
#define ARRAYSIZE(a)
Returns the number of elements in a statically defined array (of static size)
Definition macros.h:185