Ordering

Fab settings, file formats and what to upload to JLCPCB.

Everything the fab needs is generated by make production and lands in production/.

Order settings

File formats

Gerbers are RS-274X, metric, 4.6 format, absolute origin, with X2 attributes disabled and soldermask subtracted from silkscreen. Drill files are Excellon, metric, absolute origin, with plated and non-plated holes separated and gerberX2 drill maps alongside.

The zip contains exactly the eleven gerber layers plus the two drill files, in stack order:

F_Cu.gtl  In1_Cu.g1  In2_Cu.g2  B_Cu.gbl
F_Mask.gts  B_Mask.gbs  F_Silkscreen.gto  B_Silkscreen.gbo
F_Paste.gtp  B_Paste.gbp  Edge_Cuts.gm1
NPTH.drl  PTH.drl

Design rule status

DRC passes with 0 errors and 0 unconnected items against JLCPCB’s 4-layer 1 oz limits, and ERC passes with 0 violations. Both run from make check, which exits non-zero on any violation so it can gate a commit or a CI job.

Upload the right BOM

make production stages exactly what JLC wants in production/upload/:

FemtoLCC-gerbers.zip
FemtoLCC-BOM.csv
FemtoLCC-CPL.csv

Upload those three and nothing else. make upload restages them on demand.

Do not upload FemtoLCC-parts-reference.csv. It is the complete parts list including the hand-fitted parts, and JLC answers it with

The below parts won’t be assembled due to data missing. JP6,J1,J2,SW1 designators don’t exist in the CPL file.

— those four are exactly the parts the CPL correctly does not place. If you see that message, the reference list went up instead of the assembly BOM.

The BOM and CPL must agree

JLC rejects an upload where the two files disagree on designators, with

The below parts won’t be assembled due to data missing.

listing every designator the BOM names that the CPL does not place. make bom therefore filters the assembly BOM against the CPL, and make cpl places only what the mapping assigns a part to. The two files are generated from the same mapping and cover exactly the same 101 designators.

Upload FemtoLCC-BOM.csv from production/upload/. FemtoLCC-parts-reference.csv is for your own use — it lists all 104 parts including the hand-fitted ones, and JLC rejects it.

Through-hole assembly

The CPL includes seven through-hole parts: the PMOD socket J4, the four 5.08 mm terminal blocks J5–J8, and the 3.5 mm pluggable headers J9 and J10. These were switched from Phoenix to generic equivalents precisely so JLC can source them.

This requires JLC’s through-hole assembly service, quoted separately from SMT and not offered on every order. Confirm it is available for your order before uploading.

If the upload returns “Failed processing the CPL file.” — that is a standard SMT order rejecting the through-hole placements. It has happened on this design. The file is not malformed; the parser will not take through-hole rows without the through-hole service enabled.

The fix is one flag: set Assemble=no on those four rows in tools/lcsc-parts.csv and re-run make production. They drop out of both files together, leaving 94 SMD placements that upload cleanly, and they keep their part numbers in FemtoLCC-parts-reference.csv for hand-fitting.

Assembly notes

Everything on the board is top side. Four parts remain fitted by hand and appear only in the full BOM:

P1, the USB-C connector, is assembled: its footprint is marked SMD even though it has through-hole shield legs.

Many passives use _HandSoldering / HandSolder footprint variants with elongated pads. They assemble fine, but the stencil apertures are oversized relative to the part.

production/README.md in the repository carries the remaining order-time notes — build-quantity limits from the thinnest-stocked parts, and the parts you supply yourself.